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Antonio Nino Diazede939f2016-12-14 14:31:32 +00001#
Venkatesh Yadav Abbarapuc00baee2020-11-27 04:45:01 -07002# Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
Jeremie Corbier358aa6b2021-09-07 11:49:58 +02003# Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
Soren Brinkmannc8284402016-03-06 20:16:27 -08004#
dp-arm82cb2c12017-05-03 09:38:09 +01005# SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmannc8284402016-03-06 20:16:27 -08006
Soren Brinkmanncd689a42017-04-06 11:44:27 -07007override ERRATA_A53_855873 := 1
Michal Simekd8133d72023-02-09 13:21:10 +01008ERRATA_A53_1530924 := 1
Masahiro Yamada34071d62016-12-19 17:41:47 +09009override PROGRAMMABLE_RESET_ADDRESS := 1
Soren Brinkmannc8284402016-03-06 20:16:27 -080010PSCI_EXTENDED_STATE_ID := 1
11A53_DISABLE_NON_TEMPORAL_HINT := 0
Soren Brinkmann47395a22016-07-08 14:45:14 -070012SEPARATE_CODE_AND_RODATA := 1
Siva Durga Prasad Paladugu29657d02018-04-30 20:12:12 +053013ZYNQMP_WDT_RESTART := 0
Venkatesh Yadav Abbarapud7758352021-02-19 01:40:14 -070014IPI_CRC_CHECK := 0
Masahiro Yamada34071d62016-12-19 17:41:47 +090015override RESET_TO_BL31 := 1
Siva Durga Prasad Paladugu256d1332018-09-24 22:51:49 -070016override WARMBOOT_ENABLE_DCACHE_EARLY := 1
Soren Brinkmannc8284402016-03-06 20:16:27 -080017
Jan Kiszka41432682020-07-14 22:36:59 +020018EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
19
Jeremie Corbier358aa6b2021-09-07 11:49:58 +020020# pncd SPD requires secure SGI to be handled at EL1
21ifeq (${SPD},pncd)
22ifeq (${ZYNQMP_WDT_RESTART},1)
23$(error "Error: ZYNQMP_WDT_RESTART and SPD=pncd are incompatible")
24endif
25override GICV2_G0_FOR_EL3 := 0
26else
27override GICV2_G0_FOR_EL3 := 1
28endif
29
David Cunado3872fc22017-10-31 23:19:21 +000030# Do not enable SVE
31ENABLE_SVE_FOR_NS := 0
32
Dimitris Papastamos383c8082018-01-24 16:41:14 +000033WORKAROUND_CVE_2017_5715 := 0
34
Venkatesh Yadav Abbarapubfc514f2022-07-28 08:50:30 +053035ARM_XLAT_TABLES_LIB_V1 := 1
Venkatesh Yadav Abbarapuc884c9a2022-05-06 14:07:15 +053036$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
37$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
38
Soren Brinkmann01555332016-04-14 10:27:00 -070039ifdef ZYNQMP_ATF_MEM_BASE
40 $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE))
41
42 ifndef ZYNQMP_ATF_MEM_SIZE
43 $(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE")
44 endif
45 $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE))
46
47 ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE
48 $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE))
49 endif
Soren Brinkmannc8284402016-03-06 20:16:27 -080050endif
51
Soren Brinkmann01555332016-04-14 10:27:00 -070052ifdef ZYNQMP_BL32_MEM_BASE
53 $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE))
Soren Brinkmannc8284402016-03-06 20:16:27 -080054
Soren Brinkmann01555332016-04-14 10:27:00 -070055 ifndef ZYNQMP_BL32_MEM_SIZE
56 $(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE")
57 endif
58 $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
59endif
Soren Brinkmannc8284402016-03-06 20:16:27 -080060
Soren Brinkmann7de544a2016-06-10 09:57:14 -070061
Siva Durga Prasad Paladugu29657d02018-04-30 20:12:12 +053062ifdef ZYNQMP_WDT_RESTART
Michal Simekbb1768c2022-03-09 08:53:20 +010063 $(eval $(call add_define,ZYNQMP_WDT_RESTART))
Siva Durga Prasad Paladugu29657d02018-04-30 20:12:12 +053064endif
65
Venkatesh Yadav Abbarapufe550ed2019-04-04 14:23:32 +053066ifdef ZYNQMP_IPI_CRC_CHECK
Michal Simekbb1768c2022-03-09 08:53:20 +010067 $(warning "ZYNQMP_IPI_CRC_CHECK macro is deprecated...instead please use IPI_CRC_CHECK.")
Venkatesh Yadav Abbarapud7758352021-02-19 01:40:14 -070068endif
69
70ifdef IPI_CRC_CHECK
71 $(eval $(call add_define,IPI_CRC_CHECK))
Venkatesh Yadav Abbarapufe550ed2019-04-04 14:23:32 +053072endif
73
Vesa Jääskeläinend0b72862022-04-29 08:47:24 +030074ifdef ZYNQMP_SECURE_EFUSES
75 $(eval $(call add_define,ZYNQMP_SECURE_EFUSES))
76endif
77
Venkatesh Yadav Abbarapufe550ed2019-04-04 14:23:32 +053078PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
79 -Iinclude/plat/arm/common/aarch64/ \
Jolly Shah703a5aa2019-01-08 11:25:28 -080080 -Iplat/xilinx/common/include/ \
Wendy Liang26f15342019-01-21 13:45:48 +053081 -Iplat/xilinx/common/ipi_mailbox_service/ \
Soren Brinkmannc8284402016-03-06 20:16:27 -080082 -Iplat/xilinx/zynqmp/include/ \
Wendy Liange8ffe792017-09-06 09:39:55 -070083 -Iplat/xilinx/zynqmp/pm_service/ \
Soren Brinkmannc8284402016-03-06 20:16:27 -080084
Michal Simek0a8143d2021-05-27 09:42:37 +020085include lib/libfdt/libfdt.mk
Venkatesh Yadav Abbarapu84f2e342020-12-03 20:27:18 -070086# Include GICv2 driver files
87include drivers/arm/gic/v2/gicv2.mk
88
Soby Mathew3e4b8fd2016-04-08 16:42:58 +010089PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
90 lib/xlat_tables/aarch64/xlat_tables.c \
Venkatesh Yadav Abbarapuc00baee2020-11-27 04:45:01 -070091 drivers/arm/dcc/dcc_console.c \
Soren Brinkmanne1cb4da2016-06-22 09:02:56 -070092 drivers/delay_timer/delay_timer.c \
93 drivers/delay_timer/generic_delay_timer.c \
Venkatesh Yadav Abbarapu84f2e342020-12-03 20:27:18 -070094 ${GICV2_SOURCES} \
Soby Mathewb1271092016-08-08 12:33:06 +010095 drivers/cadence/uart/aarch64/cdns_console.S \
Soren Brinkmannc8284402016-03-06 20:16:27 -080096 plat/arm/common/arm_cci.c \
Soby Mathewbc149bf2016-07-07 08:45:56 +010097 plat/arm/common/arm_common.c \
Soren Brinkmannc8284402016-03-06 20:16:27 -080098 plat/arm/common/arm_gicv2.c \
99 plat/common/plat_gicv2.c \
Jolly Shah63436bd2019-01-08 11:31:49 -0800100 plat/xilinx/common/ipi.c \
Venkatesh Yadav Abbarapu830774b2021-01-23 22:16:47 -0700101 plat/xilinx/zynqmp/zynqmp_ipi.c \
102 plat/common/aarch64/crash_console_helpers.S \
Soren Brinkmannc8284402016-03-06 20:16:27 -0800103 plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S \
104 plat/xilinx/zynqmp/aarch64/zynqmp_common.c
105
Venkatesh Yadav Abbarapuc00baee2020-11-27 04:45:01 -0700106ZYNQMP_CONSOLE ?= cadence
107ifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc))
108else
109 $(error "Please define ZYNQMP_CONSOLE")
110endif
111$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE}))
112
Soren Brinkmannc8284402016-03-06 20:16:27 -0800113BL31_SOURCES += drivers/arm/cci/cci.c \
114 lib/cpus/aarch64/aem_generic.S \
115 lib/cpus/aarch64/cortex_a53.S \
Soby Mathewbb2162f2016-05-03 12:31:18 +0100116 plat/common/plat_psci_common.c \
Michal Simek0a8143d2021-05-27 09:42:37 +0200117 common/fdt_fixup.c \
118 ${LIBFDT_SRCS} \
Wendy Liang26f15342019-01-21 13:45:48 +0530119 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
Jolly Shah65c80d62019-01-09 12:37:57 -0800120 plat/xilinx/common/pm_service/pm_ipi.c \
Venkatesh Yadav Abbarapu4d9f8252020-01-07 03:25:16 -0700121 plat/xilinx/common/plat_startup.c \
Soren Brinkmannc8284402016-03-06 20:16:27 -0800122 plat/xilinx/zynqmp/bl31_zynqmp_setup.c \
123 plat/xilinx/zynqmp/plat_psci.c \
124 plat/xilinx/zynqmp/plat_zynqmp.c \
Soren Brinkmannc8284402016-03-06 20:16:27 -0800125 plat/xilinx/zynqmp/plat_topology.c \
126 plat/xilinx/zynqmp/sip_svc_setup.c \
127 plat/xilinx/zynqmp/pm_service/pm_svc_main.c \
128 plat/xilinx/zynqmp/pm_service/pm_api_sys.c \
Rajan Vajae52e10a2018-01-17 02:39:21 -0800129 plat/xilinx/zynqmp/pm_service/pm_api_pinctrl.c \
Rajan Vajaf76918a2018-01-17 02:39:23 -0800130 plat/xilinx/zynqmp/pm_service/pm_api_ioctl.c \
Rajan Vajacaae4972018-01-17 02:39:25 -0800131 plat/xilinx/zynqmp/pm_service/pm_api_clock.c \
Wendy Liang26f15342019-01-21 13:45:48 +0530132 plat/xilinx/zynqmp/pm_service/pm_client.c
133
Jan Kiszka41432682020-07-14 22:36:59 +0200134ifeq (${SDEI_SUPPORT},1)
135BL31_SOURCES += plat/xilinx/zynqmp/zynqmp_ehf.c \
136 plat/xilinx/zynqmp/zynqmp_sdei.c
137endif
138
Venkatesh Yadav Abbarapue9930d42020-07-13 21:18:01 -0600139BL31_CPPFLAGS += -fno-jump-tables
Venkatesh Yadav Abbarapu67abd472021-12-06 21:28:34 -0700140TF_CFLAGS_aarch64 += -mbranch-protection=none
Venkatesh Yadav Abbarapue9930d42020-07-13 21:18:01 -0600141
Amit Nagal496d7082023-02-15 18:43:55 +0530142ifdef CUSTOM_PKG_PATH
143include $(CUSTOM_PKG_PATH)/custom_pkg.mk
144else
145BL31_SOURCES += plat/xilinx/zynqmp/custom_sip_svc.c
146endif
147
Wendy Liang26f15342019-01-21 13:45:48 +0530148ifneq (${RESET_TO_BL31},1)
149 $(error "Using BL31 as the reset vector is only one option supported on ZynqMP. Please set RESET_TO_BL31 to 1.")
150endif