blob: ab33eab33ecd58a5cb16837976e0e7e5b6ac1fa2 [file] [log] [blame]
Rex-BC Chen27132f12021-09-28 11:24:09 +08001#
2# Copyright (c) 2021, MediaTek Inc. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7MTK_PLAT := plat/mediatek
8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
9
10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
Christine Zhu206f1252021-10-11 21:29:58 +080011 -I${MTK_PLAT}/common/drivers/gic600/ \
Guodong Liuaf5a0c42021-10-15 16:52:18 +080012 -I${MTK_PLAT}/common/drivers/gpio/ \
Rex-BC Chena6a0af52021-10-06 18:55:53 +080013 -I${MTK_PLAT}/common/drivers/timer/ \
Edward-JW Yang95ea87f2021-11-01 20:20:18 +080014 -I${MTK_PLAT_SOC}/drivers/dcm/ \
Penny Jan1b17e342021-10-03 10:11:04 +080015 -I${MTK_PLAT_SOC}/drivers/emi_mpu/ \
Guodong Liuaf5a0c42021-10-15 16:52:18 +080016 -I${MTK_PLAT_SOC}/drivers/gpio/ \
James Lo5bc88ec2021-10-06 18:12:30 +080017 -I${MTK_PLAT_SOC}/drivers/pmic/ \
Rex-BC Chen27132f12021-09-28 11:24:09 +080018 -I${MTK_PLAT_SOC}/include/
19
Christine Zhu206f1252021-10-11 21:29:58 +080020GICV3_SUPPORT_GIC600 := 1
Rex-BC Chen27132f12021-09-28 11:24:09 +080021include drivers/arm/gic/v3/gicv3.mk
22include lib/xlat_tables_v2/xlat_tables.mk
23
24PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \
25 ${XLAT_TABLES_LIB_SRCS} \
26 plat/common/aarch64/crash_console_helpers.S \
27 plat/common/plat_psci_common.c
28
29
30BL31_SOURCES += common/desc_image_load.c \
Rex-BC Chend73e15e2021-10-06 19:00:13 +080031 drivers/delay_timer/delay_timer.c \
Guodong Liuaf5a0c42021-10-15 16:52:18 +080032 drivers/gpio/gpio.c \
Rex-BC Chend73e15e2021-10-06 19:00:13 +080033 drivers/delay_timer/generic_delay_timer.c \
Rex-BC Chen27132f12021-09-28 11:24:09 +080034 drivers/ti/uart/aarch64/16550_console.S \
35 lib/bl_aux_params/bl_aux_params.c \
36 lib/cpus/aarch64/cortex_a55.S \
37 lib/cpus/aarch64/cortex_a76.S \
38 plat/common/plat_gicv3.c \
Christine Zhu206f1252021-10-11 21:29:58 +080039 ${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \
Guodong Liuaf5a0c42021-10-15 16:52:18 +080040 ${MTK_PLAT}/common/drivers/gpio/mtgpio_common.c \
James Lo5bc88ec2021-10-06 18:12:30 +080041 ${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init.c \
Rex-BC Chen27132f12021-09-28 11:24:09 +080042 ${MTK_PLAT}/common/mtk_plat_common.c \
Rex-BC Chen5aab27d2021-10-06 19:25:50 +080043 ${MTK_PLAT}/common/mtk_sip_svc.c \
Rex-BC Chen27132f12021-09-28 11:24:09 +080044 ${MTK_PLAT}/common/params_setup.c \
Rex-BC Chena6a0af52021-10-06 18:55:53 +080045 ${MTK_PLAT}/common/drivers/timer/mt_timer.c \
Zhengnan Chen109b91e2021-10-12 17:05:49 +080046 ${MTK_PLAT}/common/mtk_cirq.c \
Rex-BC Chen27132f12021-09-28 11:24:09 +080047 ${MTK_PLAT_SOC}/aarch64/platform_common.c \
48 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
49 ${MTK_PLAT_SOC}/bl31_plat_setup.c \
Edward-JW Yang95ea87f2021-11-01 20:20:18 +080050 ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm.c \
51 ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm_utils.c \
Penny Jan1b17e342021-10-03 10:11:04 +080052 ${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \
Guodong Liuaf5a0c42021-10-15 16:52:18 +080053 ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \
James Lo5bc88ec2021-10-06 18:12:30 +080054 ${MTK_PLAT_SOC}/drivers/pmic/pmic.c \
Rex-BC Chen27132f12021-09-28 11:24:09 +080055 ${MTK_PLAT_SOC}/plat_pm.c \
Rex-BC Chen5aab27d2021-10-06 19:25:50 +080056 ${MTK_PLAT_SOC}/plat_sip_calls.c \
Rex-BC Chen27132f12021-09-28 11:24:09 +080057 ${MTK_PLAT_SOC}/plat_topology.c
58
59# Configs for A76 and A55
60HW_ASSISTED_COHERENCY := 1
61USE_COHERENT_MEM := 0
62CTX_INCLUDE_AARCH32_REGS := 0
63ERRATA_A55_1530923 := 1
64ERRATA_A55_1221012 := 1
65
66# indicate the reset vector address can be programmed
67PROGRAMMABLE_RESET_ADDRESS := 1
68
69COLD_BOOT_SINGLE_CPU := 1
70
71MACH_MT8186 := 1
72$(eval $(call add_define,MACH_MT8186))
73
74include lib/coreboot/coreboot.mk