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Jeenu Viswambharan10bcd762017-01-03 11:01:51 +00001/*
Boyan Karatotevdd9fae12023-01-25 18:50:10 +00002 * Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +00003 *
dp-arm82cb2c12017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +00005 */
6
Antonio Nino Diaz43534992018-10-25 17:11:02 +01007#ifndef ERRATA_REPORT_H
8#define ERRATA_REPORT_H
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +00009
Julius Wernerd5dfdeb2019-07-09 13:49:11 -070010#ifndef __ASSEMBLER__
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +000011
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +000012void print_errata_status(void);
Roberto Vargas7fabe1a2018-02-12 12:36:17 +000013void errata_print_msg(unsigned int status, const char *cpu, const char *id);
Roberto Vargas7fabe1a2018-02-12 12:36:17 +000014
Julius Wernerd5dfdeb2019-07-09 13:49:11 -070015#endif /* __ASSEMBLER__ */
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +000016
17/* Errata status */
18#define ERRATA_NOT_APPLIES 0
19#define ERRATA_APPLIES 1
20#define ERRATA_MISSING 2
21
johpow013a2710d2020-10-07 15:08:01 -050022/* Macro to get CPU revision code for checking errata version compatibility. */
23#define CPU_REV(r, p) ((r << 4) | p)
24
Antonio Nino Diaz43534992018-10-25 17:11:02 +010025#endif /* ERRATA_REPORT_H */