blob: dc875e526dcc7138c803ac061c5ed15a7a7c6a19 [file] [log] [blame]
Dan Handleyb4315302015-03-19 18:58:55 +00001#
Arvind Ram Prakash42d4d3b2022-11-22 14:41:00 -06002# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
Dan Handleyb4315302015-03-19 18:58:55 +00003#
dp-arm82cb2c12017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Dan Handleyb4315302015-03-19 18:58:55 +00005#
6
Chris Kay1fa05da2021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Soby Mathew877cf3f2016-07-11 14:13:56 +01009ifeq (${ARCH}, aarch64)
10 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
11 # DRAM (if available) or the TZC secured area of DRAM.
Dimitris Papastamos66db10c2018-01-02 10:25:50 +000012 # TZC secured DRAM is the default.
Dan Handleyb4315302015-03-19 18:58:55 +000013
Dimitris Papastamos66db10c2018-01-02 10:25:50 +000014 ARM_TSP_RAM_LOCATION ?= dram
Qixiang Xu7ca267b2017-10-13 09:04:12 +080015
Soby Mathew877cf3f2016-07-11 14:13:56 +010016 ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
18 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
19 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
20 else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
21 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
22 else
23 $(error "Unsupported ARM_TSP_RAM_LOCATION value")
24 endif
25
26 # Process flags
Soby Mathew877cf3f2016-07-11 14:13:56 +010027 # Process ARM_BL31_IN_DRAM flag
28 ARM_BL31_IN_DRAM := 0
29 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
30 $(eval $(call add_define,ARM_BL31_IN_DRAM))
Roberto Vargasd58f3ca2017-10-20 10:46:23 +010031else
32 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
Dan Handleyb4315302015-03-19 18:58:55 +000033endif
34
Roberto Vargasd58f3ca2017-10-20 10:46:23 +010035$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
36
37
Soby Mathew2204afd2015-04-16 14:49:09 +010038# For the original power-state parameter format, the State-ID can be encoded
39# according to the recommended encoding or zero. This flag determines which
40# State-ID encoding to be parsed.
41ARM_RECOM_STATE_ID_ENC := 0
42
Douglas Raillard91a422d2016-11-07 17:29:34 +000043# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
44# be set. Else throw a build error.
Soby Mathew2204afd2015-04-16 14:49:09 +010045ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
46 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
Douglas Raillard91a422d2016-11-07 17:29:34 +000047 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
48 PSCI_EXTENDED_STATE_ID is set for ARM platforms)
Soby Mathew2204afd2015-04-16 14:49:09 +010049 endif
50endif
51
52# Process ARM_RECOM_STATE_ID_ENC flag
53$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
54$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
55
Juan Castillo7b4c1402015-10-06 14:01:35 +010056# Process ARM_DISABLE_TRUSTED_WDOG flag
Zelalem Aweke07e96d12021-10-01 12:30:49 -050057# By default, Trusted Watchdog is always enabled unless
58# SPIN_ON_BL1_EXIT or ENABLE_RME is set
Juan Castillo7b4c1402015-10-06 14:01:35 +010059ARM_DISABLE_TRUSTED_WDOG := 0
Zelalem Aweke07e96d12021-10-01 12:30:49 -050060ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
Juan Castillo7b4c1402015-10-06 14:01:35 +010061ARM_DISABLE_TRUSTED_WDOG := 1
62endif
63$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
64$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
65
Juan Castillo0e5dcdd2015-11-06 16:02:32 +000066# Process ARM_CONFIG_CNTACR
67ARM_CONFIG_CNTACR := 1
68$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
69$(eval $(call add_define,ARM_CONFIG_CNTACR))
70
David Wang4518dd92016-03-07 11:02:57 +080071# Process ARM_BL31_IN_DRAM flag
72ARM_BL31_IN_DRAM := 0
73$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
74$(eval $(call add_define,ARM_BL31_IN_DRAM))
75
Sandrine Bailleux1164a592022-07-04 11:17:43 +020076# As per CCA security model, all root firmware must execute from on-chip secure
77# memory. This means we must not run BL31 from TZC-protected DRAM.
78ifeq (${ARM_BL31_IN_DRAM},1)
79 ifeq (${ENABLE_RME},1)
80 $(error "BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0")
81 endif
82endif
83
Summer Qind8d6cf22017-02-28 16:46:17 +000084# Process ARM_PLAT_MT flag
85ARM_PLAT_MT := 0
86$(eval $(call assert_boolean,ARM_PLAT_MT))
87$(eval $(call add_define,ARM_PLAT_MT))
88
Antonio Nino Diaz3b211ff2017-04-11 14:04:56 +010089# Use translation tables library v2 by default
90ARM_XLAT_TABLES_LIB_V1 := 0
91$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
92$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
93
Antonio Nino Diazb726c162018-05-11 11:15:10 +010094# Don't have the Linux kernel as a BL33 image by default
95ARM_LINUX_KERNEL_AS_BL33 := 0
96$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
97$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
98
99ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
Andre Przywarae27340a2021-02-08 17:40:48 +0000100 ifneq (${ARCH},aarch64)
Manish Pandeyed2c4f42018-11-02 13:28:25 +0000101 ifneq (${RESET_TO_SP_MIN},1)
102 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
103 endif
Antonio Nino Diazb726c162018-05-11 11:15:10 +0100104 endif
105 ifndef PRELOADED_BL33_BASE
106 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
107 endif
Zelalem Aweke672d6692021-07-26 21:39:05 -0500108 ifeq (${RESET_TO_BL31},1)
109 ifndef ARM_PRELOADED_DTB_BASE
110 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is
111 used with RESET_TO_BL31.")
112 endif
113 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
Antonio Nino Diazb726c162018-05-11 11:15:10 +0100114 endif
Antonio Nino Diazb726c162018-05-11 11:15:10 +0100115endif
116
Mikael Olssonb139f1c2022-08-15 17:12:58 +0200117# Arm(R) Ethos(TM)-N NPU SiP service
Mikael Olsson76a21172021-02-12 17:30:22 +0100118ARM_ETHOSN_NPU_DRIVER := 0
119$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER))
120$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER))
121
Bjorn Engstrom035c9112022-08-26 09:45:45 +0200122# Arm(R) Ethos(TM)-N NPU TZMP1
123ARM_ETHOSN_NPU_TZMP1 := 0
124$(eval $(call assert_boolean,ARM_ETHOSN_NPU_TZMP1))
125$(eval $(call add_define,ARM_ETHOSN_NPU_TZMP1))
126ifeq (${ARM_ETHOSN_NPU_TZMP1},1)
127 ifeq (${ARM_ETHOSN_NPU_DRIVER},0)
128 $(error ARM_ETHOSN_NPU_TZMP1 is only available if ARM_ETHOSN_NPU_DRIVER=1)
129 endif
130 ifeq (${PLAT},juno)
131 $(eval $(call add_define,JUNO_ETHOSN_TZMP1))
132 else
133 $(error ARM_ETHOSN_NPU_TZMP1 only supported on Juno platform, not ${PLAT})
134 endif
135endif
136
Antonio Nino Diazd77b98c2017-05-24 14:11:07 +0100137# Use an implementation of SHA-256 with a smaller memory footprint but reduced
138# speed.
139$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
140
Summer Qin71fb3962017-04-20 16:28:39 +0100141# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
142# in the FIP if the platform requires.
143ifneq ($(BL32_EXTRA1),)
Masahiro Yamada33950dd2018-01-26 11:42:01 +0900144$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Summer Qin71fb3962017-04-20 16:28:39 +0100145endif
146ifneq ($(BL32_EXTRA2),)
Masahiro Yamada33950dd2018-01-26 11:42:01 +0900147$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Summer Qin71fb3962017-04-20 16:28:39 +0100148endif
149
Soby Mathewd75f2572016-05-23 16:07:53 +0100150# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
Soby Mathew877cf3f2016-07-11 14:13:56 +0100151ENABLE_PSCI_STAT := 1
dp-arm04c1db12017-01-31 13:01:04 +0000152ENABLE_PMF := 1
Soby Mathewd75f2572016-05-23 16:07:53 +0100153
Alexei Fedorove3f2b1a2020-09-01 15:38:32 +0100154# Override the standard libc with optimised libc_asm
155OVERRIDE_LIBC := 1
156ifeq (${OVERRIDE_LIBC},1)
157 include lib/libc/libc_asm.mk
158endif
159
Sandrine Bailleux0af559a2016-07-08 14:38:16 +0100160# On ARM platforms, separate the code and read-only data sections to allow
161# mapping the former as executable and the latter as execute-never.
162SEPARATE_CODE_AND_RODATA := 1
163
Madhukar Pappireddy0c1f1972020-01-27 15:38:26 -0600164# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
165# and NOBITS sections of BL31 image are adjacent to each other and loaded
166# into Trusted SRAM.
167SEPARATE_NOBITS_REGION := 0
168
169# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
170# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
171# the build to require that ARM_BL31_IN_DRAM is enabled as well.
172ifeq ($(SEPARATE_NOBITS_REGION),1)
173 ifneq ($(ARM_BL31_IN_DRAM),1)
174 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
175 endif
176 ifneq ($(RECLAIM_INIT_CODE),0)
177 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
178 endif
179endif
180
Soby Mathewe60f2af2017-05-10 11:50:30 +0100181# Disable ARM Cryptocell by default
182ARM_CRYPTOCELL_INTEG := 0
183$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
184$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
185
Manish Pandey7285fd52021-06-10 15:22:48 +0100186# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
187ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
188 ENABLE_PIE := 1
Manish Pandey133a5c62019-11-06 13:17:46 +0000189endif
190
Soby Mathew943bb7f2018-09-18 11:42:42 +0100191# CryptoCell integration relies on coherent buffers for passing data from
192# the AP CPU to the CryptoCell
193ifeq (${ARM_CRYPTOCELL_INTEG},1)
194 ifeq (${USE_COHERENT_MEM},0)
195 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.")
196 endif
197endif
198
Manish V Badarkheef1daa42021-02-22 17:30:17 +0000199# Disable GPT parser support, use FIP image by default
200ARM_GPT_SUPPORT := 0
201$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
202$(eval $(call add_define,ARM_GPT_SUPPORT))
203
204# Include necessary sources to parse GPT image
205ifeq (${ARM_GPT_SUPPORT}, 1)
206 BL2_SOURCES += drivers/partition/gpt.c \
207 drivers/partition/partition.c
208endif
209
Manish V Badarkhea1cedad2021-04-22 14:41:27 +0100210# Enable CRC instructions via extension for ARMv8-A CPUs.
211# For ARMv8.1-A, and onwards CRC instructions are default enabled.
212# Enable HW computed CRC support unconditionally in BL2 component.
Diego Sueiro4202cd52022-11-03 17:01:39 +0000213ifeq (${ARM_ARCH_MAJOR},8)
214 ifeq (${ARM_ARCH_MINOR},0)
215 BL2_CPPFLAGS += -march=armv8-a+crc
216 endif
Manish V Badarkhea1cedad2021-04-22 14:41:27 +0100217endif
218
Manish V Badarkhe2f1177b2021-06-25 23:43:33 +0100219ifeq ($(PSA_FWU_SUPPORT),1)
220 # GPT support is recommended as per PSA FWU specification hence
221 # PSA FWU implementation is tightly coupled with GPT support,
222 # and it does not support other formats.
223 ifneq ($(ARM_GPT_SUPPORT),1)
224 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
225 endif
226 FWU_MK := drivers/fwu/fwu.mk
227 $(info Including ${FWU_MK})
228 include ${FWU_MK}
229endif
230
Soby Mathew877cf3f2016-07-11 14:13:56 +0100231ifeq (${ARCH}, aarch64)
232PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
233endif
Dan Handleyb4315302015-03-19 18:58:55 +0000234
Antonio Nino Diaz3b211ff2017-04-11 14:04:56 +0100235PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \
Antonio Nino Diaz88a05232018-06-19 09:29:36 +0100236 plat/arm/common/arm_common.c \
237 plat/arm/common/arm_console.c
Antonio Nino Diaz3b211ff2017-04-11 14:04:56 +0100238
239ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
Gary Morrison5fb061e2021-01-27 13:08:47 -0600240PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
Antonio Nino Diaz3b211ff2017-04-11 14:04:56 +0100241 lib/xlat_tables/${ARCH}/xlat_tables.c
242else
Gary Morrison5fb061e2021-01-27 13:08:47 -0600243ifeq (${XLAT_MPU_LIB_V1}, 1)
244include lib/xlat_mpu/xlat_mpu.mk
245PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS}
246else
Antonio Nino Diazbf75a372017-02-23 17:22:58 +0000247include lib/xlat_tables_v2/xlat_tables.mk
Gary Morrison5fb061e2021-01-27 13:08:47 -0600248PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
249endif
Antonio Nino Diaz3b211ff2017-04-11 14:04:56 +0100250endif
Dan Handleyb4315302015-03-19 18:58:55 +0000251
Louis Mayencourta6de8242020-02-28 16:57:30 +0000252ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \
Louis Mayencourt0a6e7e32019-10-24 15:18:46 +0100253 plat/arm/common/fconf/arm_fconf_io.c
Olivier Deprez7cd64d12020-01-23 11:24:33 +0100254ifeq (${SPD},spmd)
Balint Dobszay46789a72021-03-26 16:23:18 +0100255 ifeq (${BL2_ENABLE_SP_LOAD},1)
Olivier Deprezc33ff192020-03-19 09:27:11 +0100256 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
257 endif
Olivier Deprez7cd64d12020-01-23 11:24:33 +0100258endif
Louis Mayencourt0a6e7e32019-10-24 15:18:46 +0100259
Aditya Angadib0c97da2019-04-16 11:29:14 +0530260BL1_SOURCES += drivers/io/io_fip.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000261 drivers/io/io_memmap.c \
262 drivers/io/io_storage.c \
263 plat/arm/common/arm_bl1_setup.c \
Soby Mathew7b569282018-03-07 11:32:04 +0000264 plat/arm/common/arm_err.c \
Louis Mayencourt0a6e7e32019-10-24 15:18:46 +0100265 ${ARM_IO_SOURCES}
266
Sandrine Bailleux4c117f62015-11-26 16:31:34 +0000267ifdef EL3_PAYLOAD_BASE
Dimitris Papastamos2a246d2e2018-06-18 13:01:06 +0100268# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
Sandrine Bailleux4c117f62015-11-26 16:31:34 +0000269# their holding pen
270BL1_SOURCES += plat/arm/common/arm_pm.c
271endif
Dan Handleyb4315302015-03-19 18:58:55 +0000272
Soby Mathew18e279e2017-06-12 12:37:10 +0100273BL2_SOURCES += drivers/delay_timer/delay_timer.c \
274 drivers/delay_timer/generic_delay_timer.c \
275 drivers/io/io_fip.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000276 drivers/io/io_memmap.c \
277 drivers/io/io_storage.c \
278 plat/arm/common/arm_bl2_setup.c \
Soby Mathew7b569282018-03-07 11:32:04 +0000279 plat/arm/common/arm_err.c \
Manish V Badarkhec885d5c2021-07-02 20:29:56 +0100280 common/tf_crc32.c \
Louis Mayencourt0a6e7e32019-10-24 15:18:46 +0100281 ${ARM_IO_SOURCES}
Roberto Vargas81528db2017-11-17 13:22:18 +0000282
Louis Mayencourtab1981d2019-08-08 12:03:26 +0100283# Firmware Configuration Framework sources
284include lib/fconf/fconf.mk
Roberto Vargas81528db2017-11-17 13:22:18 +0000285
Chris Kaye04da4c2021-05-20 13:22:43 +0100286BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
287BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
288
Soby Mathewcab0b5b2018-01-15 14:45:33 +0000289# Add `libfdt` and Arm common helpers required for Dynamic Config
290include lib/libfdt/libfdt.mk
Soby Mathew6e79f9f2018-03-26 15:16:46 +0100291
292DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \
Soby Mathewcab0b5b2018-01-15 14:45:33 +0000293 plat/arm/common/arm_dyn_cfg_helpers.c \
David Horstmann7d111d92021-04-08 14:50:21 +0100294 common/uuid.c
Soby Mathewcab0b5b2018-01-15 14:45:33 +0000295
Chris Kay1fa05da2021-09-28 15:52:14 +0100296DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES}
297
Soby Mathew6e79f9f2018-03-26 15:16:46 +0100298BL1_SOURCES += ${DYN_CFG_SOURCES}
299BL2_SOURCES += ${DYN_CFG_SOURCES}
300
Arvind Ram Prakash42d4d3b2022-11-22 14:41:00 -0600301ifeq (${RESET_TO_BL2},1)
Roberto Vargas81528db2017-11-17 13:22:18 +0000302BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
303endif
304
Yatharth Kochar07570d52016-11-14 12:01:04 +0000305# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
306# the AArch32 descriptors.
307ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
308BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
309else
Vishnu Banavath0260eb02022-01-19 18:43:12 +0000310ifneq (${PLAT}, corstone1000)
Yatharth Kochar07570d52016-11-14 12:01:04 +0000311BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
312endif
Abdellatif El Khlifibf3ce992021-04-21 17:20:43 +0100313endif
Yatharth Kochar07570d52016-11-14 12:01:04 +0000314BL2_SOURCES += plat/arm/common/arm_image_load.c \
Yatharth Kochara8aa7fe2016-09-13 17:07:57 +0100315 common/desc_image_load.c
Summer Qin54661cd2017-04-24 16:49:28 +0100316ifeq (${SPD},opteed)
317BL2_SOURCES += lib/optee/optee_utils.c
318endif
Dan Handleyb4315302015-03-19 18:58:55 +0000319
Soby Mathew18e279e2017-06-12 12:37:10 +0100320BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
321 drivers/delay_timer/generic_delay_timer.c \
322 plat/arm/common/arm_bl2u_setup.c
Yatharth Kochardcda29f2015-10-14 15:28:11 +0100323
Vikram Kanigiri6355f232016-02-15 11:54:14 +0000324BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000325 plat/arm/common/arm_pm.c \
Dan Handleyb4315302015-03-19 18:58:55 +0000326 plat/arm/common/arm_topology.c \
Soby Mathewbb2162f2016-05-03 12:31:18 +0100327 plat/common/plat_psci_common.c
Juan Castillo1779ba62015-05-19 11:54:12 +0100328
Mikael Olsson76a21172021-02-12 17:30:22 +0100329ifneq ($(filter 1,${ENABLE_PMF} ${ARM_ETHOSN_NPU_DRIVER}),)
330ARM_SVC_HANDLER_SRCS :=
331
332ifeq (${ENABLE_PMF},1)
333ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c
334endif
335
336ifeq (${ARM_ETHOSN_NPU_DRIVER},1)
337ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \
338 drivers/delay_timer/delay_timer.c \
339 drivers/arm/ethosn/ethosn_smc.c
340endif
341
Bence Szépkúti9d725192019-10-24 15:53:23 +0200342ifeq (${ARCH}, aarch64)
343BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\
344 plat/arm/common/arm_sip_svc.c \
Mikael Olsson76a21172021-02-12 17:30:22 +0100345 ${ARM_SVC_HANDLER_SRCS}
Bence Szépkúti0531ada2019-11-07 12:09:24 +0100346else
347BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
Mikael Olsson76a21172021-02-12 17:30:22 +0100348 ${ARM_SVC_HANDLER_SRCS}
dp-armf10796a2016-09-19 11:21:03 +0100349endif
Bence Szépkúti9d725192019-10-24 15:53:23 +0200350endif
dp-armf10796a2016-09-19 11:21:03 +0100351
Jeenu Viswambharan0bef0ed2017-10-24 11:47:13 +0100352ifeq (${EL3_EXCEPTION_HANDLING},1)
Sandeep Tripathy262acea2020-08-12 18:42:13 +0530353BL31_SOURCES += plat/common/aarch64/plat_ehf.c
Jeenu Viswambharan0bef0ed2017-10-24 11:47:13 +0100354endif
355
Jeenu Viswambharan0baec2a2017-09-22 08:32:10 +0100356ifeq (${SDEI_SUPPORT},1)
357BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
Balint Dobszaycbf9e842019-12-18 15:28:00 +0100358ifeq (${SDEI_IN_FCONF},1)
359BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c
360endif
Jeenu Viswambharan0baec2a2017-09-22 08:32:10 +0100361endif
362
Jeenu Viswambharan0b9ce902018-02-06 12:21:39 +0000363# RAS sources
364ifeq (${RAS_EXTENSION},1)
365BL31_SOURCES += lib/extensions/ras/std_err_record.c \
Jeenu Viswambharana7055c52018-06-08 08:44:36 +0100366 lib/extensions/ras/ras_common.c
Jeenu Viswambharan0b9ce902018-02-06 12:21:39 +0000367endif
368
Antonio Nino Diazff6844c2019-01-31 11:01:10 +0000369# Pointer Authentication sources
370ifeq (${ENABLE_PAUTH}, 1)
Boyan Karatotev90ce8b82023-01-13 16:47:07 +0000371PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c
Antonio Nino Diazff6844c2019-01-31 11:01:10 +0000372endif
373
Achin Guptac3fb00d2019-10-11 15:50:43 +0100374ifeq (${SPD},spmd)
375BL31_SOURCES += plat/common/plat_spmd_manifest.c \
David Horstmann7d111d92021-04-08 14:50:21 +0100376 common/uuid.c \
Achin Guptac3fb00d2019-10-11 15:50:43 +0100377 ${LIBFDT_SRCS}
378
Chris Kay1fa05da2021-09-28 15:52:14 +0100379BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
Achin Guptac3fb00d2019-10-11 15:50:43 +0100380endif
381
Manish V Badarkhe586f60c2022-07-12 21:48:04 +0100382ifeq (${DRTM_SUPPORT},1)
383BL31_SOURCES += plat/arm/common/arm_err.c
384endif
385
Juan Castillo1779ba62015-05-19 11:54:12 +0100386ifneq (${TRUSTED_BOARD_BOOT},0)
387
Juan Castillo1779ba62015-05-19 11:54:12 +0100388 # Include common TBB sources
Manish V Badarkhe88c51c32022-01-08 23:08:02 +0000389 AUTH_SOURCES := drivers/auth/auth_mod.c \
390 drivers/auth/img_parser_mod.c
Sandrine Bailleux3bff9102020-01-15 10:23:25 +0100391
392 # Include the selected chain of trust sources.
393 ifeq (${COT},tbbr)
laurenw-arme31fb0f2021-03-03 14:19:38 -0600394 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
Manish V Badarkhe28e9a552020-07-23 10:43:57 +0100395 drivers/auth/tbbr/tbbr_cot_bl1.c
396 ifneq (${COT_DESC_IN_DTB},0)
397 BL2_SOURCES += lib/fconf/fconf_cot_getter.c
398 else
399 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
400 drivers/auth/tbbr/tbbr_cot_bl2.c
401 endif
Sandrine Bailleux1035a702020-02-06 14:59:33 +0100402 else ifeq (${COT},dualroot)
403 AUTH_SOURCES += drivers/auth/dualroot/cot.c
laurenw-armf2423792022-04-21 16:50:49 -0500404 else ifeq (${COT},cca)
405 AUTH_SOURCES += drivers/auth/cca/cot.c
Sandrine Bailleux3bff9102020-01-15 10:23:25 +0100406 else
407 $(error Unknown chain of trust ${COT})
408 endif
Juan Castillo1779ba62015-05-19 11:54:12 +0100409
Yatharth Kochar843ddee2016-02-01 11:04:46 +0000410 BL1_SOURCES += ${AUTH_SOURCES} \
411 bl1/tbbr/tbbr_img_desc.c \
dp-armd35dee22016-12-12 14:48:13 +0000412 plat/arm/common/arm_bl1_fwu.c \
413 plat/common/tbbr/plat_tbbr.c
Yatharth Kochar436223d2015-10-11 14:14:55 +0100414
dp-armd35dee22016-12-12 14:48:13 +0000415 BL2_SOURCES += ${AUTH_SOURCES} \
Manish V Badarkheb58956e2020-05-27 09:39:42 +0100416 plat/common/tbbr/plat_tbbr.c
Juan Castillo1779ba62015-05-19 11:54:12 +0100417
Masahiro Yamada33950dd2018-01-26 11:42:01 +0900418 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
Yatharth Kochar01912622015-10-12 12:33:47 +0100419
Manish V Badarkhe88c51c32022-01-08 23:08:02 +0000420 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
421
422 $(info Including ${IMG_PARSER_LIB_MK})
423 include ${IMG_PARSER_LIB_MK}
424endif
425
Manish V Badarkhe14db9632021-10-06 23:41:50 +0100426# Include Measured Boot makefile before any Crypto library makefile.
427# Crypto library makefile may need default definitions of Measured Boot build
428# flags present in Measured Boot makefile.
Manish V Badarkhe40814262022-06-17 11:42:17 +0100429ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),)
Manish V Badarkhe14db9632021-10-06 23:41:50 +0100430 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
431 $(info Including ${MEASURED_BOOT_MK})
432 include ${MEASURED_BOOT_MK}
Manish V Badarkhe992d97c2022-01-18 22:40:17 +0000433
laurenw-arm78da42a2022-05-31 16:39:09 -0500434 ifneq (${MBOOT_EL_HASH_ALG}, sha256)
435 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
436 endif
437
Manish V Badarkhe40814262022-06-17 11:42:17 +0100438 ifeq (${MEASURED_BOOT},1)
439 BL1_SOURCES += ${EVENT_LOG_SOURCES}
440 BL2_SOURCES += ${EVENT_LOG_SOURCES}
441 endif
442
443 ifeq (${DRTM_SUPPORT},1)
444 BL31_SOURCES += ${EVENT_LOG_SOURCES}
445 endif
Manish V Badarkhe14db9632021-10-06 23:41:50 +0100446endif
447
Manish V Badarkhec9bd1ba2022-02-25 09:06:57 +0000448ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
Manish V Badarkhe88c51c32022-01-08 23:08:02 +0000449 CRYPTO_SOURCES := drivers/auth/crypto_mod.c \
450 lib/fconf/fconf_tbbr_getter.c
451 BL1_SOURCES += ${CRYPTO_SOURCES}
452 BL2_SOURCES += ${CRYPTO_SOURCES}
Manish V Badarkhec9bd1ba2022-02-25 09:06:57 +0000453 BL31_SOURCES += drivers/auth/crypto_mod.c
Manish V Badarkhe88c51c32022-01-08 23:08:02 +0000454
Juan Castillo1779ba62015-05-19 11:54:12 +0100455 # We expect to locate the *.mk files under the directories specified below
Manish V Badarkhe88c51c32022-01-08 23:08:02 +0000456 ifeq (${ARM_CRYPTOCELL_INTEG},0)
457 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
458 else
459 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
460 endif
Juan Castillo1779ba62015-05-19 11:54:12 +0100461
462 $(info Including ${CRYPTO_LIB_MK})
463 include ${CRYPTO_LIB_MK}
Juan Castillo1779ba62015-05-19 11:54:12 +0100464endif
Daniel Boulbycb4adb02018-09-18 11:52:49 +0100465
Daniel Boulbycb4adb02018-09-18 11:52:49 +0100466ifeq (${RECLAIM_INIT_CODE}, 1)
Daniel Boulbycb4adb02018-09-18 11:52:49 +0100467 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
468 $(error "To reclaim init code xlat tables v2 must be used")
469 endif
470endif