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Jeenu Viswambharan10bcd762017-01-03 11:01:51 +00001/*
Ryan Everett1c20f052024-05-10 14:56:02 +01002 * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +00003 *
dp-arm82cb2c12017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +00005 */
6
Antonio Nino Diaz43534992018-10-25 17:11:02 +01007#ifndef ERRATA_REPORT_H
8#define ERRATA_REPORT_H
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +00009
Boyan Karatotev3f4c1e12023-01-27 09:35:10 +000010#include <lib/cpus/cpu_ops.h>
11
12
13#define ERRATUM_WA_FUNC_SIZE CPU_WORD_SIZE
14#define ERRATUM_CHECK_FUNC_SIZE CPU_WORD_SIZE
15#define ERRATUM_ID_SIZE 4
16#define ERRATUM_CVE_SIZE 2
17#define ERRATUM_CHOSEN_SIZE 1
18#define ERRATUM_MITIGATED_SIZE 1
19
20#define ERRATUM_WA_FUNC 0
21#define ERRATUM_CHECK_FUNC ERRATUM_WA_FUNC + ERRATUM_WA_FUNC_SIZE
22#define ERRATUM_ID ERRATUM_CHECK_FUNC + ERRATUM_CHECK_FUNC_SIZE
23#define ERRATUM_CVE ERRATUM_ID + ERRATUM_ID_SIZE
24#define ERRATUM_CHOSEN ERRATUM_CVE + ERRATUM_CVE_SIZE
25#define ERRATUM_MITIGATED ERRATUM_CHOSEN + ERRATUM_CHOSEN_SIZE
26#define ERRATUM_ENTRY_SIZE ERRATUM_MITIGATED + ERRATUM_MITIGATED_SIZE
27
Julius Wernerd5dfdeb2019-07-09 13:49:11 -070028#ifndef __ASSEMBLER__
Boyan Karatotev4f748cc2023-01-27 09:38:15 +000029#include <lib/cassert.h>
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +000030
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +000031void print_errata_status(void);
Roberto Vargas7fabe1a2018-02-12 12:36:17 +000032
Boyan Karatotev4f748cc2023-01-27 09:38:15 +000033/*
34 * NOTE that this structure will be different on AArch32 and AArch64. The
35 * uintptr_t will reflect the change and the alignment will be correct in both.
36 */
37struct erratum_entry {
38 uintptr_t (*wa_func)(uint64_t cpu_rev);
39 uintptr_t (*check_func)(uint64_t cpu_rev);
40 /* Will fit CVEs with up to 10 character in the ID field */
41 uint32_t id;
42 /* Denote CVEs with their year or errata with 0 */
43 uint16_t cve;
44 uint8_t chosen;
45 /* TODO(errata ABI): placeholder for the mitigated field */
46 uint8_t _mitigated;
47} __packed;
48
49CASSERT(sizeof(struct erratum_entry) == ERRATUM_ENTRY_SIZE,
50 assert_erratum_entry_asm_c_different_sizes);
Boyan Karatotev3f4c1e12023-01-27 09:35:10 +000051#else
52
53/*
54 * errata framework macro helpers
55 *
56 * NOTE an erratum and CVE id could clash. However, both numbers are very large
57 * and the probablity is minuscule. Working around this makes code very
58 * complicated and extremely difficult to read so it is not considered. In the
59 * unlikely event that this does happen, prepending the CVE id with a 0 should
60 * resolve the conflict
61 */
62#define ERRATUM(id) 0, id
63#define CVE(year, id) year, id
64#define NO_ISB 1
65#define NO_ASSERT 0
Boyan Karatotev94a75ad2023-04-04 11:29:00 +010066#define NO_APPLY_AT_RESET 0
67#define APPLY_AT_RESET 1
Harrison Mutai4d22b0e2023-06-26 16:25:21 +010068#define GET_CPU_REV 1
69#define NO_GET_CPU_REV 0
70
Boyan Karatotev94a75ad2023-04-04 11:29:00 +010071/* useful for errata that end up always being worked around */
72#define ERRATUM_ALWAYS_CHOSEN 1
Boyan Karatotev3f4c1e12023-01-27 09:35:10 +000073
Julius Wernerd5dfdeb2019-07-09 13:49:11 -070074#endif /* __ASSEMBLER__ */
Jeenu Viswambharan10bcd762017-01-03 11:01:51 +000075
76/* Errata status */
77#define ERRATA_NOT_APPLIES 0
78#define ERRATA_APPLIES 1
79#define ERRATA_MISSING 2
80
johpow013a2710d2020-10-07 15:08:01 -050081/* Macro to get CPU revision code for checking errata version compatibility. */
82#define CPU_REV(r, p) ((r << 4) | p)
83
Antonio Nino Diaz43534992018-10-25 17:11:02 +010084#endif /* ERRATA_REPORT_H */