Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 1 | /* |
Boyan Karatotev | 7791ce2 | 2025-01-21 08:44:52 +0000 | [diff] [blame] | 2 | * Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved. |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 3 | * |
dp-arm | 82cb2c1 | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <assert_macros.S> |
Varun Wadekar | c2ad38c | 2019-01-11 14:47:48 -0800 | [diff] [blame] | 10 | #include <common/bl_common.h> |
Antonio Nino Diaz | 09d40e0 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 11 | #include <common/debug.h> |
David Cunado | 55c70cb | 2017-01-17 14:40:15 +0000 | [diff] [blame] | 12 | #include <cpu_macros.S> |
Boyan Karatotev | 007433d | 2023-01-25 16:55:18 +0000 | [diff] [blame] | 13 | #include <lib/cpus/cpu_ops.h> |
Boyan Karatotev | 6bb96fa | 2023-01-27 09:37:07 +0000 | [diff] [blame] | 14 | #include <lib/cpus/errata.h> |
Antonio Nino Diaz | 09d40e0 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 15 | #include <lib/el3_runtime/cpu_data.h> |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 16 | |
Masahiro Yamada | 3d8256b | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 17 | #ifdef IMAGE_BL31 /* The power down core and cluster is needed only in BL31 */ |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 18 | /* |
Jeenu Viswambharan | 5dd9dbb | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 19 | * void prepare_cpu_pwr_dwn(unsigned int power_level) |
| 20 | * |
| 21 | * Prepare CPU power down function for all platforms. The function takes |
| 22 | * a domain level to be powered down as its parameter. After the cpu_ops |
| 23 | * pointer is retrieved from cpu_data, the handler for requested power |
| 24 | * level is called. |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 25 | */ |
Jeenu Viswambharan | 5dd9dbb | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 26 | .globl prepare_cpu_pwr_dwn |
| 27 | func prepare_cpu_pwr_dwn |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 28 | /* |
Jeenu Viswambharan | 5dd9dbb | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 29 | * If the given power level exceeds CPU_MAX_PWR_DWN_OPS, we call the |
| 30 | * power down handler for the last power level |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 31 | */ |
Jeenu Viswambharan | 5dd9dbb | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 32 | mov_imm x2, (CPU_MAX_PWR_DWN_OPS - 1) |
| 33 | cmp x0, x2 |
| 34 | csel x2, x2, x0, hi |
| 35 | |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 36 | mrs x1, tpidr_el3 |
| 37 | ldr x0, [x1, #CPU_DATA_CPU_OPS_PTR] |
Antonio Nino Diaz | 044bb2f | 2017-04-20 09:58:28 +0100 | [diff] [blame] | 38 | #if ENABLE_ASSERTIONS |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 39 | cmp x0, #0 |
| 40 | ASM_ASSERT(ne) |
| 41 | #endif |
| 42 | |
Jeenu Viswambharan | 5dd9dbb | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 43 | /* Get the appropriate power down handler */ |
| 44 | mov x1, #CPU_PWR_DWN_OPS |
| 45 | add x1, x1, x2, lsl #3 |
| 46 | ldr x1, [x0, x1] |
Varun Wadekar | 601e3ed | 2019-10-01 09:34:10 -0700 | [diff] [blame] | 47 | #if ENABLE_ASSERTIONS |
| 48 | cmp x1, #0 |
| 49 | ASM_ASSERT(ne) |
| 50 | #endif |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 51 | br x1 |
Jeenu Viswambharan | 5dd9dbb | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 52 | endfunc prepare_cpu_pwr_dwn |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 53 | |
| 54 | |
| 55 | /* |
| 56 | * Initializes the cpu_ops_ptr if not already initialized |
Vikram Kanigiri | 12e7c4a | 2015-01-29 18:27:38 +0000 | [diff] [blame] | 57 | * in cpu_data. This can be called without a runtime stack, but may |
| 58 | * only be called after the MMU is enabled. |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 59 | * clobbers: x0 - x6, x10 |
| 60 | */ |
| 61 | .globl init_cpu_ops |
| 62 | func init_cpu_ops |
| 63 | mrs x6, tpidr_el3 |
| 64 | ldr x0, [x6, #CPU_DATA_CPU_OPS_PTR] |
| 65 | cbnz x0, 1f |
| 66 | mov x10, x30 |
| 67 | bl get_cpu_ops_ptr |
Soby Mathew | 0999734 | 2014-11-18 10:14:14 +0000 | [diff] [blame] | 68 | str x0, [x6, #CPU_DATA_CPU_OPS_PTR]! |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 69 | mov x30, x10 |
| 70 | 1: |
| 71 | ret |
Kévin Petit | 8b77962 | 2015-03-24 14:03:57 +0000 | [diff] [blame] | 72 | endfunc init_cpu_ops |
Soby Mathew | add4035 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 73 | #endif /* IMAGE_BL31 */ |
| 74 | |
Masahiro Yamada | 3d8256b | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 75 | #if defined(IMAGE_BL31) && CRASH_REPORTING |
Soby Mathew | d3f70af | 2014-08-14 13:36:41 +0100 | [diff] [blame] | 76 | /* |
| 77 | * The cpu specific registers which need to be reported in a crash |
| 78 | * are reported via cpu_ops cpu_reg_dump function. After a matching |
| 79 | * cpu_ops structure entry is found, the correponding cpu_reg_dump |
| 80 | * in the cpu_ops is invoked. |
| 81 | */ |
| 82 | .globl do_cpu_reg_dump |
| 83 | func do_cpu_reg_dump |
| 84 | mov x16, x30 |
| 85 | |
| 86 | /* Get the matching cpu_ops pointer */ |
| 87 | bl get_cpu_ops_ptr |
| 88 | cbz x0, 1f |
| 89 | |
| 90 | /* Get the cpu_ops cpu_reg_dump */ |
| 91 | ldr x2, [x0, #CPU_REG_DUMP] |
| 92 | cbz x2, 1f |
| 93 | blr x2 |
| 94 | 1: |
| 95 | mov x30, x16 |
| 96 | ret |
Kévin Petit | 8b77962 | 2015-03-24 14:03:57 +0000 | [diff] [blame] | 97 | endfunc do_cpu_reg_dump |
Soby Mathew | d3f70af | 2014-08-14 13:36:41 +0100 | [diff] [blame] | 98 | #endif |
| 99 | |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 100 | /* |
| 101 | * The below function returns the cpu_ops structure matching the |
| 102 | * midr of the core. It reads the MIDR_EL1 and finds the matching |
| 103 | * entry in cpu_ops entries. Only the implementation and part number |
| 104 | * are used to match the entries. |
Javier Almansa Sobrino | 1994e56 | 2020-08-20 18:48:09 +0100 | [diff] [blame] | 105 | * |
| 106 | * If cpu_ops for the MIDR_EL1 cannot be found and |
| 107 | * SUPPORT_UNKNOWN_MPID is enabled, it will try to look for a |
| 108 | * default cpu_ops with an MIDR value of 0. |
Olivier Deprez | 2e61d68 | 2021-05-25 12:06:03 +0200 | [diff] [blame] | 109 | * (Implementation number 0x0 should be reserved for software use |
Javier Almansa Sobrino | 1994e56 | 2020-08-20 18:48:09 +0100 | [diff] [blame] | 110 | * and therefore no clashes should happen with that default value). |
| 111 | * |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 112 | * Return : |
| 113 | * x0 - The matching cpu_ops pointer on Success |
| 114 | * x0 - 0 on failure. |
| 115 | * Clobbers : x0 - x5 |
| 116 | */ |
| 117 | .globl get_cpu_ops_ptr |
| 118 | func get_cpu_ops_ptr |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 119 | /* Read the MIDR_EL1 */ |
| 120 | mrs x2, midr_el1 |
| 121 | mov_imm x3, CPU_IMPL_PN_MASK |
| 122 | |
| 123 | /* Retain only the implementation and part number using mask */ |
| 124 | and w2, w2, w3 |
Javier Almansa Sobrino | 1994e56 | 2020-08-20 18:48:09 +0100 | [diff] [blame] | 125 | |
| 126 | /* Get the cpu_ops end location */ |
Hsin-Hsiung Wang | a5c4212 | 2024-02-21 13:58:51 +0800 | [diff] [blame] | 127 | adr_l x5, (__CPU_OPS_END__ + CPU_MIDR) |
Javier Almansa Sobrino | 1994e56 | 2020-08-20 18:48:09 +0100 | [diff] [blame] | 128 | |
| 129 | /* Initialize the return parameter */ |
| 130 | mov x0, #0 |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 131 | 1: |
Javier Almansa Sobrino | 1994e56 | 2020-08-20 18:48:09 +0100 | [diff] [blame] | 132 | /* Get the cpu_ops start location */ |
Hsin-Hsiung Wang | a5c4212 | 2024-02-21 13:58:51 +0800 | [diff] [blame] | 133 | adr_l x4, (__CPU_OPS_START__ + CPU_MIDR) |
Javier Almansa Sobrino | 1994e56 | 2020-08-20 18:48:09 +0100 | [diff] [blame] | 134 | |
| 135 | 2: |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 136 | /* Check if we have reached end of list */ |
| 137 | cmp x4, x5 |
Javier Almansa Sobrino | 1994e56 | 2020-08-20 18:48:09 +0100 | [diff] [blame] | 138 | b.eq search_def_ptr |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 139 | |
| 140 | /* load the midr from the cpu_ops */ |
| 141 | ldr x1, [x4], #CPU_OPS_SIZE |
| 142 | and w1, w1, w3 |
| 143 | |
| 144 | /* Check if midr matches to midr of this core */ |
| 145 | cmp w1, w2 |
Javier Almansa Sobrino | 1994e56 | 2020-08-20 18:48:09 +0100 | [diff] [blame] | 146 | b.ne 2b |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 147 | |
| 148 | /* Subtract the increment and offset to get the cpu-ops pointer */ |
| 149 | sub x0, x4, #(CPU_OPS_SIZE + CPU_MIDR) |
Varun Wadekar | 601e3ed | 2019-10-01 09:34:10 -0700 | [diff] [blame] | 150 | #if ENABLE_ASSERTIONS |
| 151 | cmp x0, #0 |
| 152 | ASM_ASSERT(ne) |
| 153 | #endif |
Javier Almansa Sobrino | 1994e56 | 2020-08-20 18:48:09 +0100 | [diff] [blame] | 154 | #ifdef SUPPORT_UNKNOWN_MPID |
| 155 | cbnz x2, exit_mpid_found |
| 156 | /* Mark the unsupported MPID flag */ |
| 157 | adrp x1, unsupported_mpid_flag |
| 158 | add x1, x1, :lo12:unsupported_mpid_flag |
| 159 | str w2, [x1] |
| 160 | exit_mpid_found: |
| 161 | #endif |
| 162 | ret |
| 163 | |
| 164 | /* |
| 165 | * Search again for a default pointer (MIDR = 0x0) |
| 166 | * or return error if already searched. |
| 167 | */ |
| 168 | search_def_ptr: |
| 169 | #ifdef SUPPORT_UNKNOWN_MPID |
| 170 | cbz x2, error_exit |
| 171 | mov x2, #0 |
| 172 | b 1b |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 173 | error_exit: |
Javier Almansa Sobrino | 1994e56 | 2020-08-20 18:48:09 +0100 | [diff] [blame] | 174 | #endif |
Boyan Karatotev | 0d02082 | 2024-11-19 11:27:01 +0000 | [diff] [blame] | 175 | #if ENABLE_ASSERTIONS |
| 176 | /* |
| 177 | * Assert if invalid cpu_ops obtained. If this is not valid, it may |
| 178 | * suggest that the proper CPU file hasn't been included. |
| 179 | */ |
| 180 | cmp x0, #0 |
| 181 | ASM_ASSERT(ne) |
| 182 | #endif |
Soby Mathew | 9b47684 | 2014-08-14 11:33:56 +0100 | [diff] [blame] | 183 | ret |
Kévin Petit | 8b77962 | 2015-03-24 14:03:57 +0000 | [diff] [blame] | 184 | endfunc get_cpu_ops_ptr |
Soby Mathew | 7395a72 | 2014-09-22 12:11:36 +0100 | [diff] [blame] | 185 | |
Jeenu Viswambharan | 10bcd76 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 186 | .globl cpu_get_rev_var |
| 187 | func cpu_get_rev_var |
Boyan Karatotev | 36eeb59 | 2024-12-04 15:25:27 +0000 | [diff] [blame] | 188 | get_rev_var x0, x1 |
Jeenu Viswambharan | 10bcd76 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 189 | ret |
| 190 | endfunc cpu_get_rev_var |