diff --git a/include/arch/aarch64/asm_macros.S b/include/arch/aarch64/asm_macros.S
index ec2acd5..00e482b 100644
--- a/include/arch/aarch64/asm_macros.S
+++ b/include/arch/aarch64/asm_macros.S
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -225,13 +225,6 @@
 	.endm
 
 	/*
-	 * With RAS extension executes esb instruction, else NOP
-	 */
-	.macro esb
-	.inst	0xd503221f
-	.endm
-
-	/*
 	 * Helper macro to read system register value into x0
 	 */
 	.macro	read reg:req
@@ -265,6 +258,10 @@
 	msr	SYSREG_SB, xzr
 	.endm
 
+	.macro psb_csync
+	hint #17 /* use the hint synonym for compatibility */
+	.endm
+
 	/*
 	 * Macro for using speculation barrier instruction introduced by
 	 * FEAT_SB, if it's enabled.
diff --git a/include/lib/extensions/spe.h b/include/lib/extensions/spe.h
index 4801a22..0a41e1e 100644
--- a/include/lib/extensions/spe.h
+++ b/include/lib/extensions/spe.h
@@ -14,7 +14,6 @@
 void spe_enable(cpu_context_t *ctx);
 void spe_disable(cpu_context_t *ctx);
 void spe_init_el2_unused(void);
-void spe_stop(void);
 #else
 static inline void spe_enable(cpu_context_t *ctx)
 {
@@ -25,9 +24,6 @@
 static inline void spe_init_el2_unused(void)
 {
 }
-static inline void spe_stop(void)
-{
-}
 #endif /* ENABLE_SPE_FOR_NS */
 
 #endif /* SPE_H */
diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S
index a353a87..a37c7f4 100644
--- a/lib/el3_runtime/aarch64/context.S
+++ b/lib/el3_runtime/aarch64/context.S
@@ -440,6 +440,14 @@
  * -----------------------------------------------------------------
  */
 func prepare_el3_entry
+	/*
+	 * context is about to mutate, so make sure we don't affect any still
+	 * in-flight profiling operations. We don't care that they actually
+	 * finish, that can still be later. NOP if not present
+	 */
+#if ENABLE_SPE_FOR_NS
+	psb_csync
+#endif
 	save_gp_pmcr_pauth_regs
 	setup_el3_execution_context
 	ret
diff --git a/lib/extensions/spe/spe.c b/lib/extensions/spe/spe.c
index d653222..12eae35 100644
--- a/lib/extensions/spe/spe.c
+++ b/lib/extensions/spe/spe.c
@@ -14,21 +14,6 @@
 
 #include <plat/common/platform.h>
 
-typedef struct spe_ctx {
-	u_register_t pmblimitr_el1;
-} spe_ctx_t;
-
-static struct spe_ctx spe_ctxs[PLATFORM_CORE_COUNT];
-
-static inline void psb_csync(void)
-{
-	/*
-	 * The assembler does not yet understand the psb csync mnemonic
-	 * so use the equivalent hint instruction.
-	 */
-	__asm__ volatile("hint #17");
-}
-
 void spe_enable(cpu_context_t *ctx)
 {
 	el3_state_t *state = get_el3state_ctx(ctx);
@@ -90,63 +75,3 @@
 	v |= MDCR_EL2_E2PB(MDCR_EL2_E2PB_EL1);
 	write_mdcr_el2(v);
 }
-
-void spe_stop(void)
-{
-	uint64_t v;
-
-	/* Drain buffered data */
-	psb_csync();
-	dsbnsh();
-
-	/* Disable profiling buffer */
-	v = read_pmblimitr_el1();
-	v &= ~(1ULL << 0);
-	write_pmblimitr_el1(v);
-	isb();
-}
-
-static void *spe_drain_buffers_hook(const void *arg)
-{
-	if (!is_feat_spe_supported())
-		return (void *)-1;
-
-	/* Drain buffered data */
-	psb_csync();
-	dsbnsh();
-
-	return (void *)0;
-}
-
-static void *spe_context_save(const void *arg)
-{
-	unsigned int core_pos;
-	struct spe_ctx *ctx;
-
-	if (is_feat_spe_supported()) {
-		core_pos = plat_my_core_pos();
-		ctx = &spe_ctxs[core_pos];
-		ctx->pmblimitr_el1 = read_pmblimitr_el1();
-	}
-
-	return NULL;
-}
-
-static void *spe_context_restore(const void *arg)
-{
-	unsigned int core_pos;
-	struct spe_ctx *ctx;
-
-	if (is_feat_spe_supported()) {
-		core_pos = plat_my_core_pos();
-		ctx = &spe_ctxs[core_pos];
-		write_pmblimitr_el1(ctx->pmblimitr_el1);
-	}
-
-	return NULL;
-}
-
-SUBSCRIBE_TO_EVENT(cm_entering_secure_world, spe_drain_buffers_hook);
-
-SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_start, spe_context_save);
-SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_finish, spe_context_restore);
diff --git a/lib/psci/psci_common.c b/lib/psci/psci_common.c
index 375cdba..5418666 100644
--- a/lib/psci/psci_common.c
+++ b/lib/psci/psci_common.c
@@ -1169,8 +1169,6 @@
  ******************************************************************************/
 void psci_pwrdown_cpu(unsigned int power_level)
 {
-	psci_do_manage_extensions();
-
 #if HW_ASSISTED_COHERENCY
 	/*
 	 * With hardware-assisted coherency, the CPU drivers only initiate the
@@ -1290,20 +1288,3 @@
 
 	return true;
 }
-
-/*******************************************************************************
- * This function performs architectural feature specific management.
- * It ensures the architectural features are disabled during cpu
- * power off/suspend operations.
- ******************************************************************************/
-void psci_do_manage_extensions(void)
-{
-	/*
-	 * On power down we need to disable statistical profiling extensions
-	 * before exiting coherency.
-	 */
-	if (is_feat_spe_supported()) {
-		spe_stop();
-	}
-
-}