Merge "Implement SMCCC_ARCH_SOC_ID SMC call" into integration
diff --git a/docs/components/fconf.rst b/docs/components/fconf.rst
index 4ea1f5b..3856600 100644
--- a/docs/components/fconf.rst
+++ b/docs/components/fconf.rst
@@ -99,3 +99,30 @@
registered with ``FCONF_REGISTER_POPULATOR()`` as described above.
.. uml:: ../resources/diagrams/plantuml/fconf_bl2_populate.puml
+
+Namespace guidance
+~~~~~~~~~~~~~~~~~~
+
+As mentioned above, properties are logically grouped around namespaces and
+sub-namespaces. The following concepts should be considered when adding new
+properties/namespaces.
+The framework differentiates two types of properties:
+ - Properties used inside common code.
+ - Properties used inside platform specific code.
+
+The first category applies to properties being part of the firmware and shared
+across multiple platforms. They should be globally accessible and defined
+inside the ``lib/fconf`` directory. The namespace must be chosen to reflect the
+feature/data abstracted.
+Example:
+ - |TBBR| related properties: tbbr.cot.bl2_id
+ - Dynamic configuration information: dyn_cfg.dtb_info.hw_config_id
+
+The second category should represent the majority of the properties defined
+within the framework: Platform specific properties. They must be accessed only
+within the platform API and are defined only inside the platform scope. The
+namespace must contain the platform name under which the properties defined
+belong.
+Example:
+ - Arm io framework: arm.io_policies.bl31_id
+
diff --git a/plat/arm/board/fvp/fvp_common.c b/plat/arm/board/fvp/fvp_common.c
index 33f3067..c5fae56 100644
--- a/plat/arm/board/fvp/fvp_common.c
+++ b/plat/arm/board/fvp/fvp_common.c
@@ -135,7 +135,7 @@
ARM_SPM_BUF_EL3_MMAP,
#endif
/* Required by fconf APIs to read HW_CONFIG dtb loaded into DRAM */
- ARM_MAP_NS_DRAM1,
+ ARM_DTB_DRAM_NS,
{0}
};
@@ -163,7 +163,7 @@
MAP_DEVICE0,
MAP_DEVICE1,
/* Required by fconf APIs to read HW_CONFIG dtb loaded into DRAM */
- ARM_MAP_NS_DRAM1,
+ ARM_DTB_DRAM_NS,
{0}
};
#endif
diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h
index 69d49ba..1f569c2 100644
--- a/plat/arm/board/fvp/include/platform_def.h
+++ b/plat/arm/board/fvp/include/platform_def.h
@@ -52,6 +52,13 @@
#define PLAT_ARM_DRAM2_BASE ULL(0x880000000)
#define PLAT_ARM_DRAM2_SIZE UL(0x80000000)
+#define PLAT_HW_CONFIG_DTB_BASE ULL(0x82000000)
+#define PLAT_HW_CONFIG_DTB_SIZE ULL(0x8000)
+
+#define ARM_DTB_DRAM_NS MAP_REGION_FLAT( \
+ PLAT_HW_CONFIG_DTB_BASE, \
+ PLAT_HW_CONFIG_DTB_SIZE, \
+ MT_MEMORY | MT_RO | MT_NS)
/*
* Load address of BL33 for this platform port
*/
@@ -70,14 +77,14 @@
# else
# define PLAT_ARM_MMAP_ENTRIES 9
# if USE_DEBUGFS
-# define MAX_XLAT_TABLES 6
+# define MAX_XLAT_TABLES 8
# else
-# define MAX_XLAT_TABLES 5
+# define MAX_XLAT_TABLES 7
# endif
# endif
#elif defined(IMAGE_BL32)
# define PLAT_ARM_MMAP_ENTRIES 9
-# define MAX_XLAT_TABLES 5
+# define MAX_XLAT_TABLES 6
#elif !USE_ROMLIB
# define PLAT_ARM_MMAP_ENTRIES 11
# define MAX_XLAT_TABLES 5
@@ -126,7 +133,7 @@
* calculated using the current BL31 PROGBITS debug size plus the sizes of
* BL2 and BL1-RW
*/
-#define PLAT_ARM_MAX_BL31_SIZE UL(0x3B000)
+#define PLAT_ARM_MAX_BL31_SIZE UL(0x3E000)
#endif /* RESET_TO_BL31 */
#ifndef __aarch64__
diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index ca35697..4e20632 100644
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -206,9 +206,11 @@
# Support for fconf in BL31
# Added separately from the above list for better readability
+ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),)
BL31_SOURCES += common/fdt_wrappers.c \
lib/fconf/fconf.c \
plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
+endif
ifeq (${FVP_USE_SP804_TIMER},1)
BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
diff --git a/plat/arm/board/fvp/sp_min/sp_min-fvp.mk b/plat/arm/board/fvp/sp_min/sp_min-fvp.mk
index 520a70f..36bf441 100644
--- a/plat/arm/board/fvp/sp_min/sp_min-fvp.mk
+++ b/plat/arm/board/fvp/sp_min/sp_min-fvp.mk
@@ -20,8 +20,10 @@
# Support for fconf in SP_MIN(BL32)
# Added separately from the above list for better readability
+ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_SP_MIN}),)
BL32_SOURCES += common/fdt_wrappers.c \
lib/fconf/fconf.c \
plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
+endif
include plat/arm/common/sp_min/arm_sp_min.mk
diff --git a/plat/arm/board/rddaniel/include/platform_def.h b/plat/arm/board/rddaniel/include/platform_def.h
index 790ed69..a118ca3 100644
--- a/plat/arm/board/rddaniel/include/platform_def.h
+++ b/plat/arm/board/rddaniel/include/platform_def.h
@@ -32,9 +32,19 @@
(n * TZC400_OFFSET))
#define TZC_NSAID_ALL_AP U(0)
+#define TZC_NSAID_PCI U(1)
+#define TZC_NSAID_HDLCD0 U(2)
+#define TZC_NSAID_CLCD U(7)
+#define TZC_NSAID_AP U(9)
+#define TZC_NSAID_VIRTIO U(15)
#define PLAT_ARM_TZC_NS_DEV_ACCESS \
- (TZC_REGION_ACCESS_RDWR(TZC_NSAID_ALL_AP))
+ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_ALL_AP)) | \
+ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_HDLCD0)) | \
+ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_PCI)) | \
+ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_AP)) | \
+ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_CLCD)) | \
+ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_VIRTIO))
/*
* Physical and virtual address space limits for MMU in AARCH64 & AARCH32 modes