tree 3228856390ee33f83c17088cebffb2cd80f5fa77
parent 079e522d39715c39a9d5f23832d09ccdda5dfcd5
author Antonio Nino Diaz <antonio.ninodiaz@arm.com> 1470126101 +0100
committer Soby Mathew <soby.mathew@arm.com> 1471945904 +0100

Automatically select initial xlation lookup level

Instead of hardcoding a level 1 table as the base translation level
table, let the code decide which level is the most appropriate given
the virtual address space size.

As the table granularity is 4 KB, this allows the code to select
level 0, 1 or 2 as base level for AArch64. This way, instead of
limiting the virtual address space width to 39-31 bits, widths of
48-25 bit can be used.

For AArch32, this change allows the code to select level 1 or 2
as the base translation level table and use virtual address space
width of 32-25 bits.

Also removed some unused definitions related to translation tables.

Fixes ARM-software/tf-issues#362

Change-Id: Ie3bb5d6d1a4730a26700b09827c79f37ca3cdb65