tree 70f31d78ee7f5fb6f9cac028ab238add319f89ed
parent ed62bea777fcbb0f324f1044de25b8cf3752749e
parent 1e4b43644c926dbe8c831de79eb0120128f1a2ea
author TrustedFirmware Code Review <ci@trustedfirmware.org> 1739386337 +0100
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1739386337 +0100

Merge changes from topic "for-lts-v2.8.29" into lts-v2.8

* changes:
  feat(fvp): allow configurable FVP Trusted SRAM size
  fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus
  fix(security): add support in cpu_ops for CVE-2024-7881
  fix(security): add CVE-2024-7881 mitigation to Cortex-X3
  fix(security): add CVE-2024-7881 mitigation to Neoverse-V3
  fix(security): add CVE-2024-7881 mitigation to Neoverse-V2
  fix(security): add CVE-2024-7881 mitigation to Cortex-X4
  fix(security): enable WORKAROUND_CVE_2024_7881 build option
  fix(services): disable workaround discovery on aarch32 for now
  build: always prefix section names with `.`
  style: normalize linker script code style