SPM: FVP: Introduce port of SPM
This initial port of the Secure Partitions Manager to FVP supports BL31
in both SRAM and Trusted DRAM.
A document with instructions to build the SPM has been added.
Change-Id: I4ea83ff0a659be77f2cd72eaf2302cdf8ba98b32
Co-authored-by: Douglas Raillard <douglas.raillard@arm.com>
Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Co-authored-by: Achin Gupta <achin.gupta@arm.com>
Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
diff --git a/plat/arm/common/arm_common.c b/plat/arm/common/arm_common.c
index 420a386..1905c0b 100644
--- a/plat/arm/common/arm_common.c
+++ b/plat/arm/common/arm_common.c
@@ -11,6 +11,7 @@
#include <mmio.h>
#include <plat_arm.h>
#include <platform_def.h>
+#include <secure_partition.h>
extern const mmap_region_t plat_arm_mmap[];
@@ -79,6 +80,14 @@
MT_DEVICE | MT_RW | MT_SECURE);
#endif
+#if ENABLE_SPM && defined(IMAGE_BL31)
+ /* The address of the following region is calculated by the linker. */
+ mmap_add_region(SP_IMAGE_XLAT_TABLES_START,
+ SP_IMAGE_XLAT_TABLES_START,
+ SP_IMAGE_XLAT_TABLES_SIZE,
+ MT_MEMORY | MT_RW | MT_SECURE);
+#endif
+
/* Now (re-)map the platform-specific memory regions */
mmap_add(plat_arm_get_mmap());
diff --git a/plat/arm/common/arm_tzc400.c b/plat/arm/common/arm_tzc400.c
index e19ca67..23c0317 100644
--- a/plat/arm/common/arm_tzc400.c
+++ b/plat/arm/common/arm_tzc400.c
@@ -1,10 +1,11 @@
/*
- * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arm_def.h>
+#include <arm_spm_def.h>
#include <debug.h>
#include <platform_def.h>
#include <tzc400.h>
@@ -56,9 +57,26 @@
ARM_DRAM2_BASE, ARM_DRAM2_END,
ARM_TZC_NS_DRAM_S_ACCESS,
PLAT_ARM_TZC_NS_DEV_ACCESS);
-#else
+
+#if ENABLE_SPM
+ /*
+ * Region 4 set to cover Non-Secure access to the communication buffer
+ * shared with the Secure world.
+ */
+ tzc400_configure_region(PLAT_ARM_TZC_FILTERS,
+ 4,
+ ARM_SP_IMAGE_NS_BUF_BASE,
+ (ARM_SP_IMAGE_NS_BUF_BASE +
+ ARM_SP_IMAGE_NS_BUF_SIZE) - 1,
+ TZC_REGION_S_NONE,
+ PLAT_ARM_TZC_NS_DEV_ACCESS);
+#endif
+
+#else /* if defined(EL3_PAYLOAD_BASE) */
+
/* Allow secure access only to DRAM for EL3 payloads. */
tzc400_configure_region0(TZC_REGION_S_RDWR, 0);
+
#endif /* EL3_PAYLOAD_BASE */
/*