Merge changes from topic "nrd1_deprecation" into integration
* changes:
docs(changelog): remove RD-E1-Edge platform's scope
docs(maintainers): add RD-V3 variants to maintained paths
feat(neoverse_rd): deprecate and remove RD-V1 platform variants
feat(neoverse_rd): deprecate and remove RD-N1-Edge platform variants
feat(neoverse_rd): deprecate and remove SGI-575 platform
diff --git a/docs/design/firmware-design.rst b/docs/design/firmware-design.rst
index cf8cbc7..1306ecb 100644
--- a/docs/design/firmware-design.rst
+++ b/docs/design/firmware-design.rst
@@ -2599,6 +2599,9 @@
section section can be reclaimed for any data which is accessed after cold
boot initialization and it is upto the platform to make the decision.
+Please note that this will disable inlining for any functions with the __init
+attribute.
+
.. _firmware_design_pmf:
Performance Measurement Framework
diff --git a/docs/plat/arm/fvp/fvp-support.rst b/docs/plat/arm/fvp/fvp-support.rst
index 0ce1905..9535005 100644
--- a/docs/plat/arm/fvp/fvp-support.rst
+++ b/docs/plat/arm/fvp/fvp-support.rst
@@ -1,8 +1,16 @@
Fixed Virtual Platform (FVP) Support
------------------------------------
-This section lists the supported Arm |FVP| platforms. Please refer to the FVP
-documentation for a detailed description of the model parameter options.
+An |FVP| provides a complete simulation of an Arm system. This is a generic term
+used for all kinds of vastly different and incompatible systems. One category of
+these systems are the ``FVP_Base`` family of FVPs. These are entirely virtual
+platforms, largely used for early feature development. They offer a large
+degrees of customisation but share a lot of similarities. The ``fvp`` platform
+in TF-A supports these platforms only. Despite the generic name, other FVPs (eg
+FVP_TC4) have their own dedicated TF-A platforms and will not work with this one.
+
+Please refer to each FVP's documentation for a detailed description of the model
+parameter options.
The latest version of the AArch64 build of TF-A has been tested on the following
Arm FVPs without shifted affinities, and that do not support threaded CPU cores
@@ -41,9 +49,6 @@
- ``FVP_Base_Neoverse-N1``
- ``FVP_Base_Neoverse-N2``
- ``FVP_Base_Neoverse-V1``
-- ``FVP_BaseR_AEMv8R``
-- ``FVP_RD_1_AE``
-- ``FVP_TC4``
The latest version of the AArch32 build of TF-A has been tested on the
following Arm FVPs without shifted affinities, and that do not support threaded
@@ -58,9 +63,8 @@
is not compatible with legacy GIC configurations. Therefore this FVP does not
support these legacy GIC configurations.
-The *Foundation* and *Base* FVPs can be downloaded free of charge. See the `Arm
-FVP website`_. The Cortex-A models listed above are also available to download
-from `Arm's website`_.
+The *Foundation* and *Base* FVPs can be downloaded free of charge. See the
+`Arm's website`_ for download options of all FVPs.
.. note::
The build numbers quoted above are those reported by launching the FVP
@@ -94,7 +98,5 @@
*Copyright (c) 2019-2025, Arm Limited. All rights reserved.*
-.. _Arm's website: `FVP models`_
-.. _FVP models: https://developer.arm.com/products/system-design/fixed-virtual-platforms
+.. _Arm's website: https://developer.arm.com/products/system-design/fixed-virtual-platforms
.. _Linaro Release 20.01: http://releases.linaro.org/members/arm/platforms/20.01
-.. _Arm FVP website: https://developer.arm.com/products/system-design/fixed-virtual-platforms
diff --git a/drivers/measured_boot/event_log/event_print.c b/drivers/measured_boot/event_log/event_print.c
index e2ba174..1390427 100644
--- a/drivers/measured_boot/event_log/event_print.c
+++ b/drivers/measured_boot/event_log/event_print.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2020-2025, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -18,7 +18,7 @@
* @param[in/out] log_addr Pointer to Event Log
* @param[in/out] log_size Pointer to Event Log size
*/
-static void id_event_print(uint8_t **log_addr, size_t *log_size)
+static void event_log_print_id_event(uint8_t **log_addr, size_t *log_size)
{
unsigned int i;
uint8_t info_size, *info_size_ptr;
@@ -148,7 +148,7 @@
* @param[in/out] log_addr Pointer to Event Log
* @param[in/out] log_size Pointer to Event Log size
*/
-static void event2_print(uint8_t **log_addr, size_t *log_size)
+static void event_log_print_pcr_event2(uint8_t **log_addr, size_t *log_size)
{
uint32_t event_size, count;
size_t sha_size, digests_size = 0U;
@@ -250,16 +250,16 @@
* @param[in] log_addr Pointer to Event Log
* @param[in] log_size Event Log size
*/
-void dump_event_log(uint8_t *log_addr, size_t log_size)
+void event_log_dump(uint8_t *log_addr, size_t log_size)
{
#if LOG_LEVEL >= EVENT_LOG_LEVEL
assert(log_addr != NULL);
/* Print TCG_EfiSpecIDEvent */
- id_event_print(&log_addr, &log_size);
+ event_log_print_id_event(&log_addr, &log_size);
while (log_size != 0U) {
- event2_print(&log_addr, &log_size);
+ event_log_print_pcr_event2(&log_addr, &log_size);
}
#endif
}
diff --git a/include/drivers/measured_boot/event_log/event_log.h b/include/drivers/measured_boot/event_log/event_log.h
index b44526a..18abadf 100644
--- a/include/drivers/measured_boot/event_log/event_log.h
+++ b/include/drivers/measured_boot/event_log/event_log.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2020-2024, Arm Limited. All rights reserved.
+ * Copyright (c) 2020-2025, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -69,7 +69,7 @@
void event_log_init(uint8_t *event_log_start, uint8_t *event_log_finish);
void event_log_write_specid_event(void);
void event_log_write_header(void);
-void dump_event_log(uint8_t *log_addr, size_t log_size);
+void event_log_dump(uint8_t *log_addr, size_t log_size);
int event_log_measure(uintptr_t data_base, uint32_t data_size,
unsigned char hash_data[CRYPTO_MD_MAX_SIZE]);
void event_log_record(const uint8_t *hash, uint32_t event_type,
diff --git a/include/lib/libc/cdefs.h b/include/lib/libc/cdefs.h
index 97b7824..5febe9d 100644
--- a/include/lib/libc/cdefs.h
+++ b/include/lib/libc/cdefs.h
@@ -16,12 +16,19 @@
#define __aligned(x) __attribute__((__aligned__(x)))
#define __section(x) __attribute__((__section__(x)))
#define __fallthrough __attribute__((__fallthrough__))
+#define __noinline __attribute__((__noinline__))
#if RECLAIM_INIT_CODE
/*
* Add each function to a section that is unique so the functions can still
- * be garbage collected
+ * be garbage collected.
+ *
+ * NOTICE: for this to work, these functions will NOT be inlined.
+ * TODO: the noinline attribute can be removed if RECLAIM_INIT_CODE is made
+ * platform agnostic and called after bl31_main(). Then, top-level functions
+ * (those that can't be inlined like bl31_main()) can be annotated with __init
+ * and noinline can be removed.
*/
-#define __init __section(".text.init." __FILE__ "." __XSTRING(__LINE__))
+#define __init __section(".text.init." __FILE__ "." __XSTRING(__LINE__)) __noinline
#else
#define __init
#endif
diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h
index faccf31..e10770c 100644
--- a/include/plat/common/platform.h
+++ b/include/plat/common/platform.h
@@ -465,13 +465,6 @@
void plat_flush_next_bl_params(void);
/*
- * The below function enable Trusted Firmware components like SPDs which
- * haven't migrated to the new platform API to compile on platforms which
- * have the compatibility layer disabled.
- */
-unsigned int platform_core_pos_helper(unsigned long mpidr);
-
-/*
* Optional function to get SOC version
*/
int32_t plat_get_soc_version(void);
diff --git a/lib/psci/psci_main.c b/lib/psci/psci_main.c
index 34de10f..34668ea 100644
--- a/lib/psci/psci_main.c
+++ b/lib/psci/psci_main.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -305,7 +305,7 @@
int psci_migrate(u_register_t target_cpu)
{
int rc;
- u_register_t resident_cpu_mpidr;
+ u_register_t resident_cpu_mpidr = 0;
/* Validate the target cpu */
if (!is_valid_mpidr(target_cpu))
@@ -347,7 +347,7 @@
u_register_t psci_migrate_info_up_cpu(void)
{
- u_register_t resident_cpu_mpidr;
+ u_register_t resident_cpu_mpidr = 0;
int rc;
/*
diff --git a/plat/arm/board/fvp/fconf/fconf_hw_config_getter.c b/plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
index e0b7750..fb7f48e 100644
--- a/plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
+++ b/plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
@@ -84,8 +84,12 @@
/* Find the offset of the node containing "arm,psci-1.0" compatible property */
node = fdt_node_offset_by_compatible(hw_config_dtb, -1, "arm,psci-1.0");
if (node < 0) {
- ERROR("FCONF: Unable to locate node with arm,psci-1.0 compatible property\n");
- return node;
+ /* Fall back to 0.2 */
+ node = fdt_node_offset_by_compatible(hw_config_dtb, -1, "arm,psci-0.2");
+ if (node < 0) {
+ ERROR("FCONF: Unable to locate node with arm,psci compatible property\n");
+ return node;
+ }
}
err = fdt_read_uint32(hw_config_dtb, node, "max-pwr-lvl", &max_pwr_lvl);
diff --git a/plat/arm/board/fvp/fvp_bl2_measured_boot.c b/plat/arm/board/fvp/fvp_bl2_measured_boot.c
index 8bf7dad..28aef92 100644
--- a/plat/arm/board/fvp/fvp_bl2_measured_boot.c
+++ b/plat/arm/board/fvp/fvp_bl2_measured_boot.c
@@ -218,5 +218,5 @@
}
#endif /* defined(SPD_tspd) || defined(SPD_spmd) */
- dump_event_log((uint8_t *)event_log_base, event_log_cur_size);
+ event_log_dump((uint8_t *)event_log_base, event_log_cur_size);
}
diff --git a/plat/arm/board/neoverse_rd/platform/rdv3/rdv3_common_measured_boot.c b/plat/arm/board/neoverse_rd/platform/rdv3/rdv3_common_measured_boot.c
index f5160ce..c3abc4f 100644
--- a/plat/arm/board/neoverse_rd/platform/rdv3/rdv3_common_measured_boot.c
+++ b/plat/arm/board/neoverse_rd/platform/rdv3/rdv3_common_measured_boot.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -34,7 +34,7 @@
return err;
}
-int plat_mboot_measure_key(void *pk_oid, void *pk_ptr, unsigned int pk_len)
+int plat_mboot_measure_key(const void *pk_oid, const void *pk_ptr, unsigned int pk_len)
{
return rse_mboot_set_signer_id(rdv3_rse_mboot_metadata, pk_oid,
pk_ptr, pk_len);
diff --git a/plat/common/aarch64/plat_common.c b/plat/common/aarch64/plat_common.c
index ba47b30..4423863 100644
--- a/plat/common/aarch64/plat_common.c
+++ b/plat/common/aarch64/plat_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2024, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -45,18 +45,6 @@
{
}
-/*
- * Helper function for platform_get_pos() when platform compatibility is
- * disabled. This is to enable SPDs using the older platform API to continue
- * to work.
- */
-unsigned int platform_core_pos_helper(unsigned long mpidr)
-{
- int idx = plat_core_pos_by_mpidr(mpidr);
- assert(idx >= 0);
- return idx;
-}
-
#if SDEI_SUPPORT
/*
* Function that handles spurious SDEI interrupts while events are masked.
diff --git a/plat/imx/imx8m/imx8m_measured_boot.c b/plat/imx/imx8m/imx8m_measured_boot.c
index 159be00..7566403 100644
--- a/plat/imx/imx8m/imx8m_measured_boot.c
+++ b/plat/imx/imx8m/imx8m_measured_boot.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022-2024, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2025, Arm Limited. All rights reserved.
* Copyright (c) 2022, Linaro.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -78,7 +78,7 @@
/* Ensure that the Event Log is visible in Non-secure memory */
flush_dcache_range(ns_log_addr, event_log_cur_size);
- dump_event_log((uint8_t *)event_log, event_log_cur_size);
+ event_log_dump((uint8_t *)event_log, event_log_cur_size);
}
int plat_mboot_measure_key(const void *pk_oid, const void *pk_ptr,
diff --git a/plat/qemu/qemu/qemu_measured_boot.c b/plat/qemu/qemu/qemu_measured_boot.c
index 54a4156..4736f9d 100644
--- a/plat/qemu/qemu/qemu_measured_boot.c
+++ b/plat/qemu/qemu/qemu_measured_boot.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022-2024, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2025, Arm Limited. All rights reserved.
* Copyright (c) 2022-2023, Linaro.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -7,6 +7,7 @@
#include <stdint.h>
+#include <common/debug.h>
#include <drivers/measured_boot/event_log/event_log.h>
#include <drivers/measured_boot/metadata.h>
#include <plat/common/common_def.h>
@@ -65,7 +66,7 @@
event_log_cur_size = event_log_get_cur_size((uint8_t *)event_log_base);
- dump_event_log((uint8_t *)event_log_base, event_log_cur_size);
+ event_log_dump((uint8_t *)event_log_base, event_log_cur_size);
#if TRANSFER_LIST
if (!plat_handoff_mboot((void *)event_log_base, event_log_cur_size,
diff --git a/plat/rpi/rpi3/rpi3_bl1_mboot.c b/plat/rpi/rpi3/rpi3_bl1_mboot.c
index 4294365..2057962 100644
--- a/plat/rpi/rpi3/rpi3_bl1_mboot.c
+++ b/plat/rpi/rpi3/rpi3_bl1_mboot.c
@@ -131,7 +131,7 @@
event_log_record(hash_data, EV_POST_CODE, metadata_ptr);
/* Dump Event Log for user view */
- dump_event_log((uint8_t *)event_log, event_log_get_cur_size(event_log));
+ event_log_dump((uint8_t *)event_log, event_log_get_cur_size(event_log));
return rc;
}
diff --git a/plat/rpi/rpi3/rpi3_bl2_mboot.c b/plat/rpi/rpi3/rpi3_bl2_mboot.c
index 55c6923..684e697 100644
--- a/plat/rpi/rpi3/rpi3_bl2_mboot.c
+++ b/plat/rpi/rpi3/rpi3_bl2_mboot.c
@@ -106,7 +106,7 @@
flush_dcache_range(ns_log_addr, event_log_cur_size);
/* Dump Event Log for user view */
- dump_event_log((uint8_t *)event_log_start, event_log_cur_size);
+ event_log_dump((uint8_t *)event_log_start, event_log_cur_size);
#if DISCRETE_TPM
/* relinquish control of TPM locality 0 and close interface */
diff --git a/plat/ti/k3low/common/am62l_psci.c b/plat/ti/k3low/common/am62l_psci.c
index 761d30f..b14f0f5 100644
--- a/plat/ti/k3low/common/am62l_psci.c
+++ b/plat/ti/k3low/common/am62l_psci.c
@@ -32,7 +32,7 @@
core = plat_core_pos_by_mpidr(mpidr);
if (core < 0) {
ERROR("Could not get target core id: %d\n", core);
- ret = PSCI_E_INTERN_FAIL;
+ return PSCI_E_INTERN_FAIL;
}
proc_id = (uint8_t)(PLAT_PROC_START_ID + (uint32_t)core);
@@ -41,38 +41,30 @@
if (ret != 0) {
ERROR("Request for processor ID 0x%x failed: %d\n",
proc_id, ret);
- ret = PSCI_E_INTERN_FAIL;
+ return PSCI_E_INTERN_FAIL;
}
- if (ret != PSCI_E_INTERN_FAIL) {
- ret = ti_sci_proc_set_boot_cfg(proc_id, am62l_sec_entrypoint, 0, 0);
- if (ret != 0) {
- ERROR("Request to set core boot address failed: %d\n", ret);
- ret = PSCI_E_INTERN_FAIL;
- }
+ ret = ti_sci_proc_set_boot_cfg(proc_id, am62l_sec_entrypoint, 0, 0);
+ if (ret != 0) {
+ ERROR("Request to set core boot address failed: %d\n", ret);
+ return PSCI_E_INTERN_FAIL;
}
- if (ret != PSCI_E_INTERN_FAIL) {
- /* sanity check these are off before starting a core */
- ret = ti_sci_proc_set_boot_ctrl(proc_id,
- 0, PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ |
- PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS |
- PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM);
- if (ret != 0) {
- ERROR("Request to clear boot config failed: %d\n", ret);
- ret = PSCI_E_INTERN_FAIL;
- }
+ /* sanity check these are off before starting a core */
+ ret = ti_sci_proc_set_boot_ctrl(proc_id,
+ 0, PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ |
+ PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS |
+ PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM);
+ if (ret != 0) {
+ ERROR("Request to clear boot config failed: %d\n", ret);
+ return PSCI_E_INTERN_FAIL;
}
- if (ret != PSCI_E_INTERN_FAIL) {
- /*
- * TODO: Add the actual PM operation call
- * to turn on the core here
- */
- ret = PSCI_E_SUCCESS;
- }
-
- return ret;
+ /*
+ * TODO: Add the actual PM operation call
+ * to turn on the core here
+ */
+ return PSCI_E_SUCCESS;
}
static void am62l_pwr_domain_off(const psci_power_state_t *target_state)