refactor(cpufeat): enable FEAT_NV2 for FEAT_STATE_CHECKED
At the moment we only support for FEAT_NV2 to be either unconditionally
compiled in, or to be not supported at all.
Add support for runtime detection (CTX_INCLUDE_NEVE_REGS=2), by
splitting get_armv8_4_feat_nv_support() into an ID register reading
function and a second function to report the support status. That
function considers both build time settings and runtime information
(if needed), and is used before we access the VNCR_EL2 system register.
Also move the context saving code from assembly to C, and use the new
is_feat_nv2_supported() function to guard its execution.
Change the FVP platform default to the now supported dynamic option (=2),
so the right decision can be made by the code at runtime.
Change-Id: I85b080641995fb72cfd4ac933f7a3f75770c2cb9
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h
index 58abd44..8663ab8 100644
--- a/include/arch/aarch64/arch.h
+++ b/include/arch/aarch64/arch.h
@@ -119,6 +119,7 @@
#define MPAMVPM7_EL2 S3_4_C10_C6_7
#define MPAMVPMV_EL2 S3_4_C10_C4_1
#define TRFCR_EL2 S3_4_C1_C2_1
+#define VNCR_EL2 S3_4_C2_C2_0
#define PMSCR_EL2 S3_4_C9_C9_0
#define TFSR_EL2 S3_4_C5_C6_0
#define CONTEXTIDR_EL2 S3_4_C13_C0_1