tree 65ec4e21ba293bc53bc58c182805e05e0873918f
parent 1b70db06ff8dcd34c4d6ad5a3499f602318d376d
author Dan Handley <dan.handley@arm.com> 1427732116 +0100
committer Dan Handley <dan.handley@arm.com> 1430154306 +0100

Remove use of PLATFORM_CACHE_LINE_SIZE

The required platform constant PLATFORM_CACHE_LINE_SIZE is
unnecessary since CACHE_WRITEBACK_GRANULE effectively provides the
same information. CACHE_WRITEBACK_GRANULE is preferred since this
is an architecturally defined term and allows comparison with the
corresponding hardware register value.

Replace all usage of PLATFORM_CACHE_LINE_SIZE with
CACHE_WRITEBACK_GRANULE.

Also, add a runtime assert in BL1 to check that the provided
CACHE_WRITEBACK_GRANULE matches the value provided in CTR_EL0.

Change-Id: If87286be78068424217b9f3689be358356500dcd