feat(imx8ulp): enable the DDR frequency scaling support
Enable the DDR frequency scaling support on i.MX8ULP.
Normally, the freq_index define is as below:
0: boot frequency;
1: low frequency(PLL bypassed);
2. high frequency(PLL ON).
Currently, DDR DFS only do frequency switching between
Low freq and high freq.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I3acd8bdf75e2dd6dff645b9f597dcfc0a756c428
diff --git a/plat/imx/imx8ulp/imx8ulp_bl31_setup.c b/plat/imx/imx8ulp/imx8ulp_bl31_setup.c
index aec9790..a89a110 100644
--- a/plat/imx/imx8ulp/imx8ulp_bl31_setup.c
+++ b/plat/imx/imx8ulp/imx8ulp_bl31_setup.c
@@ -19,6 +19,7 @@
#include <plat/common/platform.h>
#include <platform_def.h>
+#include <dram.h>
#include <imx8_lpuart.h>
#include <imx8ulp_caam.h>
#include <imx_plat_common.h>
@@ -153,6 +154,8 @@
xrdc_enable();
imx8ulp_caam_init();
+
+ dram_init();
}
entry_point_info_t *bl31_plat_get_next_image_ep_info(unsigned int type)