tree 90575551e1a680c9599c1a58353df85536afb26d
parent 3b8a3ad1508fdcfef7f3487da5a32636b0bc4ada
author Govindraj Raja <govindraj.raja@arm.com> 1737501153 -0600
committer Varun Wadekar <vwadekar@nvidia.com> 1739883702 +0000

fix(cpus): workaround for Cortex-A720 erratum 3699561

Cortex-A720 erratum 3699561 that applies to all revisions <= r0p2
and is still Open.

The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2439421/latest/

Change-Id: I7ea3aaf3e7bf6b4f3648f6872e505a41247b14ba
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
(cherry picked from commit 050c4a38a335c721c2f6ce38c33f1aa6aa328800)