refactor(mte): remove mte, mte_perm
Currently both FEAT_MTE and FEAT_MTE_PERM aren't used for enabling
of any feature bits in EL3. So remove both FEAT handling.
All mte regs that are currently context saved/restored are needed
only when FEAT_MTE2 is enabled, so move to usage of FEAT_MTE2 and
remove FEAT_MTE usage.
BREAKING CHANGE: Any platform or downstream code trying to use
SCR_EL3.ATA bit(26) will see failures as this is now moved to be
used only with FEAT_MTE2 with
commit@ef0d0e5478a3f19cbe70a378b9b184036db38fe2
Change-Id: Id01e154156571f7792135639e17dc5c8d0e17cf8
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
diff --git a/docs/components/secure-partition-manager.rst b/docs/components/secure-partition-manager.rst
index 4834d3a..b6f4219 100644
--- a/docs/components/secure-partition-manager.rst
+++ b/docs/components/secure-partition-manager.rst
@@ -215,7 +215,7 @@
ARM_ARCH_MINOR=5 \
BRANCH_PROTECTION=1 \
CTX_INCLUDE_PAUTH_REGS=1 \
- ENABLE_FEAT_MTE=1 \
+ ENABLE_FEAT_MTE2=1 \
BL32=<path-to-hafnium-binary> \
BL33=<path-to-bl33-binary> \
SP_LAYOUT_FILE=sp_layout.json \
@@ -233,7 +233,7 @@
ARM_ARCH_MINOR=5 \
BRANCH_PROTECTION=1 \
CTX_INCLUDE_PAUTH_REGS=1 \
- ENABLE_FEAT_MTE=1 \
+ ENABLE_FEAT_MTE2=1 \
BL32=<path-to-hafnium-binary> \
BL33=<path-to-bl33-binary> \
SP_LAYOUT_FILE=sp_layout.json \
diff --git a/docs/design/firmware-design.rst b/docs/design/firmware-design.rst
index fa06c8e..2ba54ea 100644
--- a/docs/design/firmware-design.rst
+++ b/docs/design/firmware-design.rst
@@ -2800,9 +2800,11 @@
- Branch Target Identification feature is selected by ``BRANCH_PROTECTION``
option set to 1. This option defaults to 0.
-- Memory Tagging Extension feature is unconditionally enabled for both worlds.
- To enable MTE at EL0 use ``ENABLE_FEAT_MTE`` is required and to enable MTE at
- ELX ``ENABLE_FEAT_MTE2`` is required.
+- Memory Tagging Extension feature has few variants but not all of them require
+ enablement from EL3 to be used at lower EL. e.g. Memory tagging only at
+ EL0(MTE) does not require EL3 configuration however memory tagging at
+ EL2/EL1 (MTE2) does require EL3 enablement and we need to set this option
+ ``ENABLE_FEAT_MTE2`` to 1. This option defaults to 0.
Armv7-A
~~~~~~~
diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index f817da0..c18c155 100644
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -340,23 +340,11 @@
flag can take the values 0 to 2, to align with the ``ENABLE_FEAT``
mechanism. Default value is ``0``.
-- ``ENABLE_FEAT_MTE``: Numeric value to enable Memory Tagging Extension
- if the platform wants to use this feature at EL0 ``ENABLE_FEAT_MTE`` is
- required. This flag can take values 0 to 2, to align with the ``ENABLE_FEAT``
- feature detection mechanism. Default value is ``0``.
-
- ``ENABLE_FEAT_MTE2``: Numeric value to enable Memory Tagging Extension2
if the platform wants to use this feature and MTE2 is enabled at ELX.
This flag can take values 0 to 2, to align with the ``ENABLE_FEAT``
mechanism. Default value is ``0``.
-- ``ENABLE_FEAT_MTE_PERM``: Numeric value to enable support for
- ``FEAT_MTE_PERM``, which introduces Allocation tag access permission to
- memory region attributes. ``FEAT_MTE_PERM`` is a optional architectural
- feature available from v8.9 and upwards. This flag can take the values 0 to
- 2, to align with the ``ENABLE_FEAT`` mechanism. Default value is
- ``0``.
-
- ``ENABLE_FEAT_PAN``: Numeric value to enable the ``FEAT_PAN`` (Privileged
Access Never) extension. ``FEAT_PAN`` adds a bit to PSTATE, generating a
permission fault for any privileged data access from EL1/EL2 to virtual