| commit | 8dec63032e8d173215fc5a4b6540ecbc189cbf87 | [log] [tgz] |
|---|---|---|
| author | Jagdish Gediya <jagdish.gediya@arm.com> | Mon Jul 01 07:40:03 2024 +0000 |
| committer | Icen.Zeyada <Icen.Zeyada2@arm.com> | Thu Jan 09 10:17:24 2025 +0000 |
| tree | 995c08435fd1fab084e80307cce98463c5b42c79 | |
| parent | 5de9d79bc4b2febe3b55db47039ab2004d8cd4af [diff] |
fix(tc): modify ethernet configuration for TC4 FPGA Modify ethernet base addr and irq numbers for TC4 FPGA in dts to match with its RoS configuration. Change-Id: I7b180c3eb90d7557d0011a25a742106f703cd264 Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com> Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>