diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index ef24f2e..ee8da17 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -240,6 +240,9 @@
 -  ``ERRATA_N1_1207823``: This applies errata 1207823 workaround to Neoverse-N1
    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
 
+-  ``ERRATA_N1_1220197``: This applies errata 1220197 workaround to Neoverse-N1
+   CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
+
 -  ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1
    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
 
diff --git a/include/lib/cpus/aarch64/neoverse_n1.h b/include/lib/cpus/aarch64/neoverse_n1.h
index 8925827..952ae6e 100644
--- a/include/lib/cpus/aarch64/neoverse_n1.h
+++ b/include/lib/cpus/aarch64/neoverse_n1.h
@@ -30,6 +30,8 @@
  ******************************************************************************/
 #define NEOVERSE_N1_CPUECTLR_EL1	S3_0_C15_C1_4
 
+#define NEOVERSE_N1_WS_THR_L2_MASK	(ULL(3) << 24)
+
 /*******************************************************************************
  * CPU Auxiliary Control register specific definitions.
  ******************************************************************************/
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S
index c9bcea8..0e7b8e8 100644
--- a/lib/cpus/aarch64/neoverse_n1.S
+++ b/lib/cpus/aarch64/neoverse_n1.S
@@ -185,6 +185,33 @@
 endfunc check_errata_1207823
 
 /* --------------------------------------------------
+ * Errata Workaround for Neoverse N1 Errata #1220197
+ * This applies to revision <=r2p0 of Neoverse N1.
+ * Inputs:
+ * x0: variant[4:7] and revision[0:3] of current cpu.
+ * Shall clobber: x0-x17
+ * --------------------------------------------------
+ */
+func errata_n1_1220197_wa
+	/* Compare x0 against revision r2p0 */
+	mov	x17, x30
+	bl	check_errata_1220197
+	cbz	x0, 1f
+	mrs	x1, NEOVERSE_N1_CPUECTLR_EL1
+	orr	x1, x1, NEOVERSE_N1_WS_THR_L2_MASK
+	msr	NEOVERSE_N1_CPUECTLR_EL1, x1
+	isb
+1:
+	ret	x17
+endfunc errata_n1_1220197_wa
+
+func check_errata_1220197
+	/* Applies to <=r2p0 */
+	mov	x1, #0x20
+	b	cpu_rev_var_ls
+endfunc check_errata_1220197
+
+/* --------------------------------------------------
  * Errata Workaround for Neoverse N1 Erratum 1315703.
  * This applies to revision <= r3p0 of Neoverse N1.
  * Inputs:
@@ -252,6 +279,11 @@
 	bl	errata_n1_1207823_wa
 #endif
 
+#if ERRATA_N1_1220197
+	mov	x0, x18
+	bl	errata_n1_1220197_wa
+#endif
+
 #if ERRATA_N1_1315703
 	mov	x0, x18
 	bl	errata_n1_1315703_wa
@@ -318,6 +350,7 @@
 	report_errata ERRATA_N1_1130799, neoverse_n1, 1130799
 	report_errata ERRATA_N1_1165347, neoverse_n1, 1165347
 	report_errata ERRATA_N1_1207823, neoverse_n1, 1207823
+	report_errata ERRATA_N1_1220197, neoverse_n1, 1220197
 	report_errata ERRATA_N1_1315703, neoverse_n1, 1315703
 	report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184
 
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 78efbeb..bb53dad 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -254,6 +254,10 @@
 # only to revision <= r2p0 of the Neoverse N1 cpu.
 ERRATA_N1_1207823	?=0
 
+# Flag to apply erratum 1220197 workaround during reset. This erratum applies
+# only to revision <= r2p0 of the Neoverse N1 cpu.
+ERRATA_N1_1220197	?=0
+
 # Flag to apply erratum 1315703 workaround during reset. This erratum applies
 # to revisions before r3p1 of the Neoverse N1 cpu.
 ERRATA_N1_1315703	?=1
@@ -463,6 +467,10 @@
 $(eval $(call assert_boolean,ERRATA_N1_1207823))
 $(eval $(call add_define,ERRATA_N1_1207823))
 
+# Process ERRATA_N1_1220197 flag
+$(eval $(call assert_boolean,ERRATA_N1_1220197))
+$(eval $(call add_define,ERRATA_N1_1220197))
+
 # Process ERRATA_N1_1315703 flag
 $(eval $(call assert_boolean,ERRATA_N1_1315703))
 $(eval $(call add_define,ERRATA_N1_1315703))