diff --git a/fdts/tc.dts b/fdts/tc.dts
index d12f980..0c93bfa 100644
--- a/fdts/tc.dts
+++ b/fdts/tc.dts
@@ -587,12 +587,12 @@
 	};
 #endif /* TC_IOMMU_EN */
 
-	dp0: display@2cc00000 {
+	dp0: display@DPU_ADDR() {
 		#address-cells = <1>;
 		#size-cells = <0>;
 		compatible = "arm,mali-d71";
-		reg = <0 0x2cc00000 0 0x20000>;
-		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+		reg = <HI(DPU_ADDR(0x)) LO(DPU_ADDR(0x)) 0 0x20000>;
+		interrupts = <GIC_SPI DPU_IRQ IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "DPU";
 		DPU_CLK_ATTR1;
 #if TC_IOMMU_EN
diff --git a/fdts/tc_vers.dtsi b/fdts/tc_vers.dtsi
index 9915685..43fafd5 100644
--- a/fdts/tc_vers.dtsi
+++ b/fdts/tc_vers.dtsi
@@ -62,6 +62,13 @@
 	vsync-len = <2>
 #define ETH_COMPATIBLE		"smsc,lan91c111"
 #define MMC_REMOVABLE		cd-gpios = <&sysreg 0 0>
+#if TARGET_PLATFORM <= 2
+#define DPU_ADDR(pref)		pref##2cc00000
+#define DPU_IRQ			69
+#else /* TARGET_PLATFORM >= 3 */
+#define DPU_ADDR(pref)		pref##4000000000
+#define DPU_IRQ			579
+#endif /* TARGET_PLATFORM >= 3 */
 
 #else /* TARGET_FLAVOUR_FPGA */
 
@@ -83,6 +90,8 @@
 	vsync-len = <10>
 #define ETH_COMPATIBLE		"smsc,lan9115"
 #define MMC_REMOVABLE		non-removable
+#define DPU_ADDR(pref)		pref##2cc00000
+#define DPU_IRQ			69
 #endif /* TARGET_FLAVOUR_FPGA */
 
 /* Use SCMI controlled clocks */