feat(imx8m): enable snvs privileged registers access
Allow non-privileged access to all SNVS registers in case of no TEE is
available.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Change-Id: I44686a3639a68c72c7eacc80691c294d5c32c9ae
diff --git a/plat/imx/imx8m/imx8m_snvs.c b/plat/imx/imx8m/imx8m_snvs.c
new file mode 100644
index 0000000..7874a68
--- /dev/null
+++ b/plat/imx/imx8m/imx8m_snvs.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2022-2023 NXP
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <lib/mmio.h>
+#include <platform_def.h>
+
+#define SNVS_HPCOMR U(0x04)
+#define SNVS_NPSWA_EN BIT(31)
+
+void enable_snvs_privileged_access(void)
+{
+ unsigned int val;
+
+ val = mmio_read_32(IMX_SNVS_BASE + SNVS_HPCOMR);
+ mmio_write_32(IMX_SNVS_BASE + SNVS_HPCOMR, val | SNVS_NPSWA_EN);
+}