| commit | 88a8cd0e542ea1eaa92dcd8b5f6115dc9ed8d525 | [log] [tgz] |
|---|---|---|
| author | Harrison Mutai <harrison.mutai@arm.com> | Tue Dec 12 11:17:19 2023 +0000 |
| committer | Varun Wadekar <vwadekar@nvidia.com> | Mon Jan 29 13:06:25 2024 +0000 |
| tree | 28ca31f2335421f1ff72cb656dcc7a6b3a86b83b | |
| parent | 4f5ce871f6d741329f46af024198d60370d69a28 [diff] |
fix(cpus): workaround for Cortex X3 erratum 2743088 Cortex X3 erratum 2743088 is a Cat B erratum that applies to all revisions <= r1p1 and is fixed in r1p2. The workaround is to add a DSB instruction before the ISB of the powerdown code sequence specified in the TRM. SDEN documentation: https://developer.arm.com/documentation/2055130 Change-Id: I2c8577e3ca0781af8b1c3912e577d3bd77f92709 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>