feat(tc): add MHUv3 DT binding for TC3
MHUv3's device tree is different from MHUv2's. Add support MHUv3 DT
binding for TC3 while keeping TC2 as-is.
Change-Id: Ib2f55d3a64a4cfe2ea9e62fe39d27ed54a2ca007
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
diff --git a/fdts/tc-base.dtsi b/fdts/tc-base.dtsi
index e32d215..670630e 100644
--- a/fdts/tc-base.dtsi
+++ b/fdts/tc-base.dtsi
@@ -285,22 +285,22 @@
};
mbox_db_rx: mhu@MHU_RX_ADDR {
- compatible = "arm,mhuv2-rx","arm,primecell";
- reg = <0x0 ADDRESSIFY(MHU_RX_ADDR) 0x0 0x1000>;
+ compatible = MHU_RX_COMPAT;
+ reg = <0x0 ADDRESSIFY(MHU_RX_ADDR) 0x0 MHU_OFFSET>;
clocks = <&soc_refclk>;
clock-names = "apb_pclk";
- #mbox-cells = <2>;
- interrupts = <GIC_SPI INT_MBOX_RX IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "mhu_rx";
+ #mbox-cells = <MHU_MBOX_CELLS>;
+ interrupts = <GIC_SPI MHU_RX_INT_NUM IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = MHU_RX_INT_NAME;
};
mbox_db_tx: mhu@MHU_TX_ADDR {
- compatible = "arm,mhuv2-tx","arm,primecell";
- reg = <0x0 ADDRESSIFY(MHU_TX_ADDR) 0x0 0x1000>;
+ compatible = MHU_TX_COMPAT;
+ reg = <0x0 ADDRESSIFY(MHU_TX_ADDR) 0x0 MHU_OFFSET>;
clocks = <&soc_refclk>;
clock-names = "apb_pclk";
- #mbox-cells = <2>;
- interrupt-names = "mhu_tx";
+ #mbox-cells = <MHU_MBOX_CELLS>;
+ interrupt-names = MHU_TX_INT_NAME;
};
firmware {