| commit | 6324220805b105f10eab59fca3dee5caabfe3cb3 | [log] [tgz] |
|---|---|---|
| author | Sona Mathew <sonarebecca.mathew@arm.com> | Tue May 21 14:20:44 2024 -0500 |
| committer | Yann Gautier <yann.gautier@st.com> | Fri Feb 07 18:32:03 2025 +0100 |
| tree | fe3e70734be390bec14ff74588b7388e744e5a1b | |
| parent | 6041f0723994a6dcf783a20b341b4ee0a8d76751 [diff] |
fix(cpus): workaround for CVE-2024-5660 for Neoverse-N2 Implements mitigation for CVE-2024-5660 that affects Neoverse-N2 revisions r0p0, r0p1, r0p2, r0p3. The workaround is to disable the hardware page aggregation at EL3 by setting CPUECTLR_EL1[46] = 1'b1. This patch implements the erratum mitigation for Neoverse-N2. Public Documentation: https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-5660 Change-Id: I2b9dea78771cc159586a03ff563c0ec79591ea64 Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com> (cherry picked from commit 26e0ff9d5e99b2ea0eedfd202401655ee404e52f)