tree 079a7a69ec6b5f9dc78cb5e2216a7ecb097cb869
parent c275ea1883d6a3a0d5187ca2e2ad4705385fe722
author johpow01 <john.powell@arm.com> 1591215811 -0500
committer John Powell <john.powell@arm.com> 1593096658 +0000

Workaround for Cortex A77 erratum 1800714

Cortex A77 erratum 1800714 is a Cat B erratum, present in older
revisions of the Cortex A77 processor core.  The workaround is to
set a bit in the ECTLR_EL1 system register, which disables allocation
of splintered pages in the L2 TLB.

Since this is the first errata workaround implemented for Cortex A77,
this patch also adds the required cortex_a77_reset_func in the file
lib/cpus/aarch64/cortex_a77.S.

This errata is explained in this SDEN:
https://static.docs.arm.com/101992/0010/Arm_Cortex_A77_MP074_Software_Developer_Errata_Notice_v10.pdf

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I844de34ee1bd0268f80794e2d9542de2f30fd3ad