| commit | 58fadd62beba8e9fefddae884bfd34f71a183997 | [log] [tgz] |
|---|---|---|
| author | Igor Podgainõi <igor.podgainoi@arm.com> | Fri Nov 15 15:20:50 2024 +0100 |
| committer | Igor Podgainõi <igor.podgainoi@arm.com> | Wed Feb 05 21:19:15 2025 +0100 |
| tree | a50b9d24e2bf856b738c4d8ddec0a0f7f2bec683 | |
| parent | 0c370e2d592b96554ac6d5dca4242733ab14300f [diff] |
fix: add support for 128-bit sysregs to EL3 crash handler The following changes have been made: * Add new sysreg definitions and ASM macro is_feat_sysreg128_present_asm * Add registers TTBR0_EL2 and VTTBR_EL2 to EL3 crash handler output * Use MRRS instead of MRS for registers TTBR0_EL1, TTBR0_EL2, TTBR1_EL1, VTTBR_EL2 and PAR_EL1 Change-Id: I0e20b2c35251f3afba2df794c1f8bc0c46c197ff Signed-off-by: Igor Podgainõi <igor.podgainoi@arm.com>