diff --git a/docs/about/maintainers.rst b/docs/about/maintainers.rst
index 1f2c310..9ce6ff2 100644
--- a/docs/about/maintainers.rst
+++ b/docs/about/maintainers.rst
@@ -470,10 +470,8 @@
 
 Arm Total Compute platform port
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-:|M|: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
-:|G|: `arugan02`_
-:|M|: Usama Arif <usama.arif@arm.com>
-:|G|: `uarif1`_
+:|M|: Anders Dellien <anders.dellien@arm.com>
+:|G|: `andersdellien-arm`_
 :|F|: plat/arm/board/tc
 
 HiSilicon HiKey and HiKey960 platform ports
@@ -836,6 +834,7 @@
 :|F|: tools/conventional-changelog-tf-a
 
 .. _AlexeiFedorov: https://github.com/AlexeiFedorov
+.. _andersdellien-arm: https://github.com/andersdellien-arm
 .. _Andre-ARM: https://github.com/Andre-ARM
 .. _Anson-Huang: https://github.com/Anson-Huang
 .. _bijucdas: https://github.com/bijucdas
diff --git a/fdts/tc.dts b/fdts/tc.dts
index 2099229..1cf3f1b 100644
--- a/fdts/tc.dts
+++ b/fdts/tc.dts
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020-2021, Arm Limited. All rights reserved.
+ * Copyright (c) 2020-2022, Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -336,6 +336,15 @@
 		status = "okay";
 	};
 
+        rtc0: rtc@1C170000 {
+                compatible = "arm,pl031", "arm,primecell";
+                reg = <0x0 0x1C170000 0x0 0x1000>;
+                interrupts = <0x0 100 0x4>;
+                clocks = <&soc_refclk100mhz>;
+                clock-names = "apb_pclk";
+                wakeup-source;
+        };
+
 	vencoder {
 		compatible = "drm,virtual-encoder";