commit 4ee3a974a6ec31d147b080c7aaf3012855957928
author Manish Pandey <manish.pandey2@arm.com> Wed Jul 06 16:08:27 2022 +0200
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Wed Jul 06 16:08:27 2022 +0200
tree e8799ea3e274ddb77a49f1fcc42d274098a7c1ac
parent 303c52a742a511116ab462823edbf8d522bf80ba
parent de1ab9fe052deba06a0904b10a6e0312ca49658e

Merge changes from topic "st_fix_stm32mp13" into integration

* changes:
  fix(stm32mp13): correct USART addresses
  feat(stm32mp13): change BL33 memory mapping

plat/st/stm32mp1/stm32mp1_def.h

diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h
index 7e0745a..8ca6123 100644
--- a/plat/st/stm32mp1/stm32mp1_def.h
+++ b/plat/st/stm32mp1/stm32mp1_def.h
@@ -182,7 +182,12 @@
  #endif
 #endif
 
+#if STM32MP13
+#define STM32MP_BL33_BASE		STM32MP_DDR_BASE
+#endif
+#if STM32MP15
 #define STM32MP_BL33_BASE		(STM32MP_DDR_BASE + U(0x100000))
+#endif
 #define STM32MP_BL33_MAX_SIZE		U(0x400000)
 
 /* Define maximum page size for NAND devices */
@@ -247,8 +252,14 @@
 /*******************************************************************************
  * STM32MP1 UART
  ******************************************************************************/
+#if STM32MP13
+#define USART1_BASE			U(0x4C000000)
+#define USART2_BASE			U(0x4C001000)
+#endif
+#if STM32MP15
 #define USART1_BASE			U(0x5C000000)
 #define USART2_BASE			U(0x4000E000)
+#endif
 #define USART3_BASE			U(0x4000F000)
 #define UART4_BASE			U(0x40010000)
 #define UART5_BASE			U(0x40011000)