tree 5b177d2af06a658259bfbb8fc30f2246c5fa2b2f
parent ae6edfd5b5434e2e647ce2d6fc6f5b5f3f0ba880
author Govindraj Raja <govindraj.raja@arm.com> 1737503057 -0600
committer Yann Gautier <yann.gautier@st.com> 1738949523 +0100

fix(cpus): workaround for Cortex-A725 erratum 3699564

Cortex-A725 erratum 3699564 that applies to r0p0, r0p1 and is
fixed in r0p2.

The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2832921/latest

Change-Id: Ifad1f6c3f5b74060273f897eb5e4b79dd9f088f7
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
(cherry picked from commit d732300b86238ac7166bc9bebd667a24dc3ed062)