diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 43488e9..2945594 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -642,6 +642,10 @@
    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
    r0p1.
 
+-  ``ERRATA_N2_2743014``: This applies errata 2743014 workaround to Neoverse-N2
+   CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
+   in r0p3.
+
 -  ``ERRATA_N2_2743089``: This applies errata 2743089 workaround to Neoverse-N2
    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
    in r0p3.
diff --git a/include/lib/cpus/aarch64/neoverse_n2.h b/include/lib/cpus/aarch64/neoverse_n2.h
index cb1be5b..16839b7 100644
--- a/include/lib/cpus/aarch64/neoverse_n2.h
+++ b/include/lib/cpus/aarch64/neoverse_n2.h
@@ -46,6 +46,8 @@
  * CPU Auxiliary Control register 5 specific definitions.
  ******************************************************************************/
 #define NEOVERSE_N2_CPUACTLR5_EL1			S3_0_C15_C8_0
+#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_56		(ULL(1) << 56)
+#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_55		(ULL(1) << 55)
 #define NEOVERSE_N2_CPUACTLR5_EL1_BIT_44		(ULL(1) << 44)
 #define NEOVERSE_N2_CPUACTLR5_EL1_BIT_13		(ULL(1) << 13)
 #define NEOVERSE_N2_CPUACTLR5_EL1_BIT_17		(ULL(1) << 17)
diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S
index c82da55..d2df4d5 100644
--- a/lib/cpus/aarch64/neoverse_n2.S
+++ b/lib/cpus/aarch64/neoverse_n2.S
@@ -166,6 +166,14 @@
 
 check_erratum_ls neoverse_n2, ERRATUM(2388450), CPU_REV(0, 0)
 
+workaround_reset_start neoverse_n2, ERRATUM(2743014), ERRATA_N2_2743014
+	/* Set CPUACTLR5_EL1[56:55] to 2'b01 */
+	sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_55
+	sysreg_bit_clear NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_56
+workaround_reset_end neoverse_n2, ERRATUM(2743014)
+
+check_erratum_ls neoverse_n2, ERRATUM(2743014), CPU_REV(0, 2)
+
 workaround_runtime_start neoverse_n2, ERRATUM(2743089), ERRATA_N2_2743089
 	/* dsb before isb of power down sequence */
 	dsb	sy
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 3e1e4b5..e36ea8c 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -673,6 +673,10 @@
 # r0p3.
 CPU_FLAG_LIST += ERRATA_N2_2728475
 
+# Flag to apply erratum 2743014 workaround during reset. This erratum applies
+# to r0p0, r0p1, r0p2 of the Neoverse N2 cpu, it is fixed in r0p3.
+CPU_FLAG_LIST += ERRATA_N2_2743014
+
 # Flag to apply erratum 2743089 workaround during during powerdown. This erratum
 # applies to all revisions <= r0p2 of the Neoverse N2 cpu, it is fixed in r0p3.
 CPU_FLAG_LIST += ERRATA_N2_2743089
diff --git a/services/std_svc/errata_abi/cpu_errata_info.h b/services/std_svc/errata_abi/cpu_errata_info.h
index 00a3b73..9906fac 100644
--- a/services/std_svc/errata_abi/cpu_errata_info.h
+++ b/services/std_svc/errata_abi/cpu_errata_info.h
@@ -39,7 +39,7 @@
 #include <cortex_a9.h>
 #endif
 
-#define MAX_ERRATA_ENTRIES	16
+#define MAX_ERRATA_ENTRIES	32
 
 #define ERRATA_LIST_END		(MAX_ERRATA_ENTRIES - 1)
 
diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c
index d7f501b..e5e5b33 100644
--- a/services/std_svc/errata_abi/errata_abi_main.c
+++ b/services/std_svc/errata_abi/errata_abi_main.c
@@ -346,8 +346,9 @@
 		[12] = {2388450, 0x00, 0x00, ERRATA_N2_2388450},
 		[13] = {2728475, 0x00, 0x02, ERRATA_N2_2728475, \
 			ERRATA_NON_ARM_INTERCONNECT},
-		[14] = {2743089, 0x00, 0x02, ERRATA_N2_2743089},
-		[15 ... ERRATA_LIST_END] = UNDEF_ERRATA,
+		[14] = {2743014, 0x00, 0x02, ERRATA_N2_2743014},
+		[15] = {2743089, 0x00, 0x02, ERRATA_N2_2743089},
+		[16 ... ERRATA_LIST_END] = UNDEF_ERRATA,
 	}
 },
 #endif /* NEOVERSE_N2_H_INC */