Use ARM CCI driver on FVP and Juno platforms
This patch updates the FVP and Juno platform ports to use the common
driver for ARM Cache Coherent Interconnects.
Change-Id: Ib142f456b9b673600592616a2ec99e9b230d6542
diff --git a/plat/juno/bl1_plat_setup.c b/plat/juno/bl1_plat_setup.c
index 23e8592..fd331bf 100644
--- a/plat/juno/bl1_plat_setup.c
+++ b/plat/juno/bl1_plat_setup.c
@@ -31,7 +31,7 @@
#include <arch_helpers.h>
#include <assert.h>
#include <bl_common.h>
-#include <cci400.h>
+#include <cci.h>
#include <console.h>
#include <debug.h>
#include <mmio.h>
@@ -82,10 +82,8 @@
* Enable CCI-400 for this cluster. No need for locks as no other cpu is
* active at the moment
*/
- cci_init(CCI400_BASE,
- CCI400_SL_IFACE3_CLUSTER_IX,
- CCI400_SL_IFACE4_CLUSTER_IX);
- cci_enable_cluster_coherency(read_mpidr());
+ plat_cci_init();
+ cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
/* Allow BL1 to see the whole Trusted RAM */
bl1_tzram_layout.total_base = TZRAM_BASE;