tree 537fc802ed1520fe9d35daabbdd069cd857b5e22
parent 5f32fd2145020b0007b3f12ae6a95b734ff8e6a2
author Govindraj Raja <govindraj.raja@arm.com> 1738963029 -0600
committer Govindraj Raja <govindraj.raja@arm.com> 1739373906 -0600

fix(cpus): workaround for Cortex-X925 erratum 2963999

Cortex-X925 erratum 2963999 that applies to r0p0 and is fixed in
r0p1.

In EL3, reads of MPIDR_EL1 and MIDR_EL1 might incorrectly virtualize
which register to return when reading the value of
MPIDR_EL1/VMPIDR_EL2 and MIDR_EL1/VPIDR_EL2, respectively.

The workaround is to do an ISB prior to an MRS read to either
MPIDR_EL1 and MIDR_EL1.

SDEN documentation:
https://developer.arm.com/documentation/109180/latest/

Change-Id: I447fd359ea32e1d274e1245886e1de57d14f082c
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>