tree 1dc5bca8631d0f9751f7f69fb3bbe30d319fdd96
parent 408ba4ddfe9a8d55e3e2488bea89c39adef07981
parent fc497736f3e9439cf9f188b1a8b058d912e7be0b
author TrustedFirmware Code Review <ci@trustedfirmware.org> 1739320681 +0100
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1739320681 +0100

Merge changes from topic "for-lts-v2.10.13" into lts-v2.10

* changes:
  fix(cpus): workaround for Neoverse-V3 erratum 3701767
  fix(cpus): workaround for Neoverse-N3 erratum 3699563
  fix(cpus): workaround for Neoverse-N2 erratum 3701773
  fix(cpus): workaround for Cortex-X925 erratum 3701747
  fix(cpus): workaround for Cortex-X4 erratum 3701758
  fix(cpus): workaround for Cortex-X3 erratum 3701769
  fix(cpus): workaround for Cortex-X2 erratum 3701772
  fix(cpus): workaround for Cortex-A725 erratum 3699564
  fix(cpus): workaround for Cortex-A720 erratum 3699561
  fix(cpus): workaround for Cortex-A715 erratum 3699560
  fix(cpus): workaround for Cortex-A710 erratum 3701772
  fix(cpus): workaround for accessing ICH_VMCR_EL2
  refactor(errata-abi): move EXTRACT_PARTNUM to arch.h
  chore(cpus): fix incorrect header macro
  chore: rename hermes to neoverse-n3
  refactor(fvp): move cpus with nomodel
  fix(cm): update gic el2 sysregs save/restore mechanism
  fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus
  fix(security): add support in cpu_ops for CVE-2024-7881
  fix(security): add CVE-2024-7881 mitigation to Cortex-X3
  fix(security): add CVE-2024-7881 mitigation to Neoverse-V3
  fix(security): add CVE-2024-7881 mitigation to Neoverse-V2
  fix(security): add CVE-2024-7881 mitigation to Cortex-X925
  fix(security): add CVE-2024-7881 mitigation to Cortex-X4
  fix(security): enable WORKAROUND_CVE_2024_7881 build option