tree 7a551da632385d0acb93dc48b9b8799755c0f453
parent 515d2d46a318fa3c4c172491c6408c032e6a6b15
author Andre Przywara <andre.przywara@arm.com> 1709833884 +0000
committer Andre Przywara <andre.przywara@arm.com> 1718974824 +0100

feat(fpga): enable new CPU features

Newer cores implemented in the FPGAs used by Arm Ltd. support more
ARMv9 features.

Enable TCR2, MTE, MTE2, SME and SME2 as "enable if available" (:=2), so
any users of those features in lower ELs will not trigger a trap into
BL31.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Id99ecb7c5d6a25b77f7cc5fcad63f60027a4fd5a