tree 5ecbcc64f9ff38fcfb5f0af884e2902f52965d80
parent 1baf62469ee07c2541917fd5bd07f1a00e29231c
parent 7aca660c4e77477d81623df00fc7ffab2700dcb9
author Manish V Badarkhe <manish.badarkhe@arm.com> 1722872613 +0200
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1722872613 +0200

Merge changes from topic "us_pmu" into integration

* changes:
  fix(tc): correct CPU PMU binding
  feat(tc): add device tree binding for SPE
  feat(tc): add PPI partitions in DT binding
  feat(tc): change GIC DT property 'interrupt-cells' to 4
  feat(tc): add NI-Tower PMU node for TC3
  feat(tc): setup ni-tower non-secure access for TC3