tree 88f2157928e291ca90aff5de23fcf0585088d528
parent 3e9433d76b4629691ad9b7e61781f5a772ee285c
author Govindraj Raja <govindraj.raja@arm.com> 1737504755 -0600
committer Yann Gautier <yann.gautier@st.com> 1738687785 +0100

fix(cpus): workaround for Cortex-X3 erratum 3701769

Cortex-X3 erratum 3701769 that applies to r0p0, r1p0, r1p1 and r1p2
is still Open.

The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/

Change-Id: Ifd722e1bb8616ada2ad158297a7ca80b19a3370b
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
(cherry picked from commit 77feb745e42296c553c33bcaea5be3304168eff3)