Merge changes I0b0443d5,Ic454a87a into integration
* changes:
fix(gic): quote the correct flag on error
feat(lib): add a generic EXTRACT macro
diff --git a/drivers/arm/gic/v2/gicv2_base.c b/drivers/arm/gic/v2/gicv2_base.c
index 317375f..c51c195 100644
--- a/drivers/arm/gic/v2/gicv2_base.c
+++ b/drivers/arm/gic/v2/gicv2_base.c
@@ -12,7 +12,7 @@
#include <plat/common/platform.h>
#if USE_GIC_DRIVER != 2
-#error "This file should only be used with GENERIC_GIC_DRIVER=2"
+#error "This file should only be used with USE_GIC_DRIVER=2"
#endif
/******************************************************************************
diff --git a/drivers/arm/gic/v3/gicv3_base.c b/drivers/arm/gic/v3/gicv3_base.c
index 3c97b01..57f2314 100644
--- a/drivers/arm/gic/v3/gicv3_base.c
+++ b/drivers/arm/gic/v3/gicv3_base.c
@@ -16,7 +16,7 @@
#include <plat/common/platform.h>
#if USE_GIC_DRIVER != 3
-#error "This file should only be used with GENERIC_GIC_DRIVER=3"
+#error "This file should only be used with USE_GIC_DRIVER=3"
#endif
/* The GICv3 driver only needs to be initialized in EL3 */
diff --git a/include/lib/utils_def.h b/include/lib/utils_def.h
index 098506a..68e464a 100644
--- a/include/lib/utils_def.h
+++ b/include/lib/utils_def.h
@@ -58,12 +58,34 @@
#define GENMASK GENMASK_32
#endif
+/*
+ * Similar to GENMASK_64 but uses a named register field to compute the mask.
+ * For a register field REG_FIELD, the macros REG_FIELD_WIDTH and
+ * REG_FIELD_SHIFT must be defined.
+ */
+#define MASK(regfield) \
+ ((~0ULL >> (64ULL - (regfield##_WIDTH))) << (regfield##_SHIFT))
+
#define HI(addr) (addr >> 32)
#define LO(addr) (addr & 0xffffffff)
#define HI_64(addr) (addr >> 64)
#define LO_64(addr) (addr & 0xffffffffffffffff)
+/**
+ * EXTRACT_FIELD - Extracts a specific bit field from a value.
+ *
+ * @reg: The input value containing the field.
+
+ * @regfield: A bitmask representing the field. For a register field REG_FIELD,
+ * the macros REG_FIELD_WIDTH and REG_FIELD_SHIFT must be defined.
+
+ * The result of this macro is the contents of the field right shifted to the
+ * least significant bit positions, with the rest being zero.
+ */
+#define EXTRACT(regfield, reg) \
+ (((reg) & MASK(regfield)) >> (regfield##_SHIFT))
+
/*
* This variant of div_round_up can be used in macro definition but should not
* be used in C code as the `div` parameter is evaluated twice.
@@ -221,17 +243,4 @@
*/
#define KHZ_TICKS_PER_SEC U(1000)
-/**
- * EXTRACT_FIELD - Extracts a specific bit field from a value.
- *
- * @val: The input value containing the field.
- * @mask: A bitmask representing the maximum value of the field
- * @shift: The starting bit position of the field.
- *
- * This macro shifts the input value (@val) to the right by @shift bits,
- * aligning the target field to the least significant bits (LSB).
- * It then applies @mask to extract only the relevant bits.
- */
-#define EXTRACT_FIELD(val, mask, shift) (((val) >> (shift)) & (mask))
-
#endif /* UTILS_DEF_H */
diff --git a/include/services/drtm_svc.h b/include/services/drtm_svc.h
index 86110db..56ae129 100644
--- a/include/services/drtm_svc.h
+++ b/include/services/drtm_svc.h
@@ -246,10 +246,10 @@
#define DRTM_LAUNCH_FEAT_PCR_USAGE_SCHEMA_SHIFT U(1)
#define DRTM_LAUNCH_FEAT_HASHING_TYPE_SHIFT U(0)
-#define DRTM_LAUNCH_FEAT_DLME_IMG_AUTH_MASK U(0x1)
-#define DRTM_LAUNCH_FEAT_MEM_PROTECTION_TYPE_MASK U(0x7)
-#define DRTM_LAUNCH_FEAT_PCR_USAGE_SCHEMA_MASK U(0x3)
-#define DRTM_LAUNCH_FEAT_HASHING_TYPE_MASK U(0x1)
+#define DRTM_LAUNCH_FEAT_DLME_IMG_AUTH_WIDTH U(1)
+#define DRTM_LAUNCH_FEAT_MEM_PROTECTION_TYPE_WIDTH U(3)
+#define DRTM_LAUNCH_FEAT_PCR_USAGE_SCHEMA_WIDTH U(2)
+#define DRTM_LAUNCH_FEAT_HASHING_TYPE_WIDTH U(1)
#define DLME_IMG_AUTH U(0x1)
#define REG_MEM_PROTECTION_TYPE U(0x1)
diff --git a/services/std_svc/drtm/drtm_main.c b/services/std_svc/drtm/drtm_main.c
index 8f71571..b7a03f3 100644
--- a/services/std_svc/drtm/drtm_main.c
+++ b/services/std_svc/drtm/drtm_main.c
@@ -329,10 +329,8 @@
* Ensure that if DLME Authorities Schema (Bits [2:1]) is set, then
* DLME image authentication (Bit[6]) must also be set
*/
- if ((EXTRACT_FIELD(val, DRTM_LAUNCH_FEAT_PCR_USAGE_SCHEMA_MASK,
- DRTM_LAUNCH_FEAT_PCR_USAGE_SCHEMA_SHIFT) == DLME_AUTH_SCHEMA) &&
- (EXTRACT_FIELD(val, DRTM_LAUNCH_FEAT_DLME_IMG_AUTH_MASK,
- DRTM_LAUNCH_FEAT_DLME_IMG_AUTH_SHIFT) != DLME_IMG_AUTH)) {
+ if ((EXTRACT(DRTM_LAUNCH_FEAT_PCR_USAGE_SCHEMA, val) == DLME_AUTH_SCHEMA) &&
+ (EXTRACT(DRTM_LAUNCH_FEAT_DLME_IMG_AUTH, val) != DLME_IMG_AUTH)) {
return INVALID_PARAMETERS;
}
@@ -340,8 +338,7 @@
* Check if Bits [5:3] (Memory protection type) matches with platform's
* memory protection type
*/
- if (EXTRACT_FIELD(val, DRTM_LAUNCH_FEAT_MEM_PROTECTION_TYPE_MASK,
- DRTM_LAUNCH_FEAT_MEM_PROTECTION_TYPE_SHIFT) !=
+ if (EXTRACT(DRTM_LAUNCH_FEAT_MEM_PROTECTION_TYPE, val) !=
__builtin_ctz(plat_dma_prot_feat->dma_protection_support)) {
return INVALID_PARAMETERS;
}
@@ -350,8 +347,7 @@
* Check if Bits [0] (Type of hashing) matches with platform's
* supported hash type.
*/
- if (EXTRACT_FIELD(val, DRTM_LAUNCH_FEAT_HASHING_TYPE_MASK,
- DRTM_LAUNCH_FEAT_HASHING_TYPE_SHIFT) !=
+ if (EXTRACT(DRTM_LAUNCH_FEAT_HASHING_TYPE, val) !=
plat_tpm_feat->tpm_based_hash_support) {
return INVALID_PARAMETERS;
}