Fixing various warnings
* Missing and incorrect # Safety comments
* Unused functions and variables
* Refactoring conditional AArch64 compilation
Signed-off-by: Imre Kis <imre.kis@arm.com>
Change-Id: Ie638d1eeb2928a0c6eb0d4eb64c9d19b82f91e4d
diff --git a/src/lib.rs b/src/lib.rs
index 4c529dc..202776d 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -2,7 +2,6 @@
// SPDX-License-Identifier: MIT OR Apache-2.0
#![allow(dead_code)]
-#![allow(non_camel_case_types)]
#![cfg_attr(not(test), no_std)]
extern crate alloc;
@@ -55,6 +54,7 @@
/// Memory attributes
///
/// MAIR_EL1 should be configured in the same way in startup.s
+#[allow(non_camel_case_types)]
#[derive(PrimitiveEnum_u8, Clone, Copy, Debug, PartialEq, Eq, Default)]
pub enum MemoryAttributesIndex {
#[default]
@@ -361,6 +361,7 @@
/// caller must ensure that the new mapping will not break any existing
/// references. After activation the caller must ensure that there are no
/// active references when unmapping memory.
+ #[cfg(target_arch = "aarch64")]
pub unsafe fn activate(&self) {
// Select translation granule
let is_tg0 = match &self.regime {
@@ -374,7 +375,6 @@
TranslationRegime::EL2_0(RegimeVaRange::Upper, _) => false,
};
- #[cfg(target_arch = "aarch64")]
if is_tg0 {
self.modify_tcr(|tcr| {
let tg0 = match self.granule {
@@ -400,7 +400,6 @@
// Set translation table
let base_table_pa = KernelSpace::kernel_to_pa(self.base_table.get_pa().0 as u64);
- #[cfg(target_arch = "aarch64")]
match &self.regime {
TranslationRegime::EL1_0(RegimeVaRange::Lower, asid) => core::arch::asm!(
"msr ttbr0_el1, {0}
@@ -431,6 +430,11 @@
}
}
+ /// # Safety
+ /// Dummy functions for test builds
+ #[cfg(not(target_arch = "aarch64"))]
+ pub unsafe fn activate(&self) {}
+
/// Modifies the TCR register of the selected regime of the instance.
#[cfg(target_arch = "aarch64")]
unsafe fn modify_tcr<F>(&self, f: F)
@@ -887,10 +891,10 @@
}
}
+ #[cfg(target_arch = "aarch64")]
fn invalidate(regime: &TranslationRegime, va: Option<VirtualAddress>) {
// SAFETY: The assembly code invalidates the translation table entry of
// the VA or all entries of the translation regime.
- #[cfg(target_arch = "aarch64")]
unsafe {
if let Some(VirtualAddress(va)) = va {
match regime {
@@ -949,6 +953,9 @@
}
}
}
+
+ #[cfg(not(target_arch = "aarch64"))]
+ fn invalidate(_regime: &TranslationRegime, _va: Option<VirtualAddress>) {}
}
impl<const VA_BITS: usize> fmt::Debug for Xlat<VA_BITS> {