commit e9a3e76d319b59146498c3cc356eac04a3dbab69
author Balint Dobszay <balint.dobszay@arm.com> Wed Feb 26 17:29:57 2025 +0100
committer Balint Dobszay <balint.dobszay@arm.com> Fri Feb 28 15:34:24 2025 +0100
tree 698d96a6740851a175369cda20b3915d82b5c70c
parent a5846855570eb4e66843bb70176739b3f86c1c2a

Fix clippy lints

Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
Change-Id: Idfd8209650a7525a49240fe79a7e6245bbb99f95

src/memory_management.rs

diff --git a/src/memory_management.rs b/src/memory_management.rs
index e81a5ca..925fe44 100644
--- a/src/memory_management.rs
+++ b/src/memory_management.rs
@@ -61,7 +61,7 @@
 
 impl From<[u32; 2]> for Handle {
     fn from(value: [u32; 2]) -> Self {
-        Self((value[1] as u64) << 32 | value[0] as u64)
+        Self(((value[1] as u64) << 32) | value[0] as u64)
     }
 }
 
@@ -200,11 +200,11 @@
     fn from(value: MemType) -> Self {
         match value {
             MemType::NotSpecified => MemType::NOT_SPECIFIED << MemType::SHIFT,
-            MemType::Device(attr) => attr as u16 | MemType::DEVICE << MemType::SHIFT,
+            MemType::Device(attr) => attr as u16 | (MemType::DEVICE << MemType::SHIFT),
             MemType::Normal {
                 cacheability,
                 shareability,
-            } => cacheability as u16 | shareability as u16 | MemType::NORMAL << MemType::SHIFT,
+            } => cacheability as u16 | shareability as u16 | (MemType::NORMAL << MemType::SHIFT),
         }
     }
 }