diff --git a/build_helper/build_helper_config_maps.py b/build_helper/build_helper_config_maps.py
index a6dbe6a..2ddb045 100644
--- a/build_helper/build_helper_config_maps.py
+++ b/build_helper/build_helper_config_maps.py
@@ -155,7 +155,10 @@
                                    "-DEXTRA_NS_TEST_SUITE_PATH=%(codebase_root_dir)s/../tf-m-extras/partitions/measured_boot/test/non_secure "),
 
     # Provisioning blob signing
-    "RSE_PROVISIONING_ASYMMETRIC" : ("-DRSE_SYMMETRIC_PROVISIONING=OFF")
+    "RSE_PROVISIONING_ASYMMETRIC" : ("-DRSE_SYMMETRIC_PROVISIONING=OFF"),
+
+    # Copy ROM code to SRAM in BL1_2 and execute from there
+    "RSE_COPY_USE_ROM_LIB_IN_SRAM" : ("-DRSE_USE_ROM_LIB_FROM_SRAM=ON")
 }
 
 mapTfmExtrasExamplePaths = {
diff --git a/build_helper/build_helper_configs.py b/build_helper/build_helper_configs.py
index 2e5a9b2..8d65d3e 100755
--- a/build_helper/build_helper_configs.py
+++ b/build_helper/build_helper_configs.py
@@ -410,6 +410,9 @@
                     # RSE_TC4_GCC_2_Release_BL2_ATTESTATION_SCHEME_CCA
                     ("arm/rse/tc/tc4", "GCC_10_3", "2",
                      "OFF", "OFF", "Release", True, "", "ATTESTATION_SCHEME_CCA"),
+                    # RSE_TC4_GCC_2_RegS_RegNS_MinSizeRel_BL2_RSE_COPY_USE_ROM_LIB_IN_SRAM
+                    ("arm/rse/tc/tc4", "GCC_10_3", "2",
+                     "RegS, RegNS", "OFF", "MinSizeRel", True, "", "RSE_COPY_USE_ROM_LIB_IN_SRAM"),
                     # RSE_RDV3_GCC_2_Release_BL2_NSOFF_CFG0
                     ("arm/rse/neoverse_rd/rdv3", "GCC_10_3", "2",
                      "OFF", "OFF", "Release", True, "", "NSOFF, CFG0"),
@@ -1124,6 +1127,10 @@
                     # BL1_1 tests only support symmetric provisioning config
                     ("arm/rse/tc/tc4", "*", "*", "RegBL1_1", "*",
                      "*", True, "*", "RSE_PROVISIONING_ASYMMETRIC"),
+                ],
+                "valid": [
+                    ("arm/rse/tc/tc4", "*", "*", "*", "*",
+                     "MinSizeRel", True, "*", "RSE_COPY_USE_ROM_LIB_IN_SRAM"),
                 ]
                 }