RSE: Add symmetric provisioning build config

Change the existing RSE_PROVISIONING_ASYMMETRIC build config to instead
set the flag to ON. This reflects a change in TF-M which sets it
to OFF by default. We can also remove the build exclusion for the
BL1_1 tests as part of this change as it is no longer required. Also update RSE related builds to use GCC 13.2.

Change-Id: I83e5efd8587a002efb31df58627fa8f464b6b6d0
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
diff --git a/build_helper/build_helper_config_maps.py b/build_helper/build_helper_config_maps.py
index 2ddb045..c2eb18e 100644
--- a/build_helper/build_helper_config_maps.py
+++ b/build_helper/build_helper_config_maps.py
@@ -155,7 +155,7 @@
                                    "-DEXTRA_NS_TEST_SUITE_PATH=%(codebase_root_dir)s/../tf-m-extras/partitions/measured_boot/test/non_secure "),
 
     # Provisioning blob signing
-    "RSE_PROVISIONING_ASYMMETRIC" : ("-DRSE_SYMMETRIC_PROVISIONING=OFF"),
+    "RSE_PROVISIONING_SYMMETRIC" : ("-DRSE_SYMMETRIC_PROVISIONING=ON"),
 
     # Copy ROM code to SRAM in BL1_2 and execute from there
     "RSE_COPY_USE_ROM_LIB_IN_SRAM" : ("-DRSE_USE_ROM_LIB_FROM_SRAM=ON")
diff --git a/build_helper/build_helper_configs.py b/build_helper/build_helper_configs.py
index 8d65d3e..818f230 100755
--- a/build_helper/build_helper_configs.py
+++ b/build_helper/build_helper_configs.py
@@ -387,40 +387,40 @@
                     ("arm/musca_s1", "GCC_10_3", "1",
                      "RegBL2, RegS, RegNS", "OFF", "Release", True, "", "CC_DRIVER_PSA"),
                     # RSE_TC3_GCC_3_RegS_RegNS_Release_BL2_ATTESTATION_SCHEME_DPE
-                    #("arm/rse/tc/tc3", "GCC_10_3", "3",
+                    #("arm/rse/tc/tc3", "GCC_13_2", "3",
                     # "RegS, RegNS", "OFF", "Release", True, "", "ATTESTATION_SCHEME_DPE"),
                     # RSE_TC3_GCC_2_RegBL1_1_Debug_BL2
-                    #("arm/rse/tc/tc3", "GCC_10_3", "2",
+                    #("arm/rse/tc/tc3", "GCC_13_2", "2",
                     # "RegBL1_1", "OFF", "Debug", True, "", ""),
                     # RSE_TC3_GCC_2_Release_BL2_ATTESTATION_SCHEME_CCA
-                    #("arm/rse/tc/tc3", "GCC_10_3", "2",
+                    #("arm/rse/tc/tc3", "GCC_13_2", "2",
                     # "OFF", "OFF", "Release", True, "", "ATTESTATION_SCHEME_CCA"),
                     # RSE_TC4_GCC_3_RegS_RegNS_Release_BL2_ATTESTATION_SCHEME_DPE
-                    ("arm/rse/tc/tc4", "GCC_10_3", "3",
+                    ("arm/rse/tc/tc4", "GCC_13_2", "3",
                      "RegS, RegNS", "OFF", "Release", True, "", "ATTESTATION_SCHEME_DPE"),
-                    # RSE_TC4_GCC_3_RegS_RegNS_Release_BL2_RSE_PROVISIONING_ASYMMETRIC
-                    ("arm/rse/tc/tc4", "GCC_10_3", "3",
-                     "RegS, RegNS", "OFF", "Release", True, "", "RSE_PROVISIONING_ASYMMETRIC"),
+                    # RSE_TC4_GCC_3_RegS_RegNS_Release_BL2_RSE_PROVISIONING_SYMMETRIC
+                    ("arm/rse/tc/tc4", "GCC_13_2", "3",
+                     "RegS, RegNS", "OFF", "Release", True, "", "RSE_PROVISIONING_SYMMETRIC"),
                     # RSE_TC4_GCC_2_Debug_BL2
-                    ("arm/rse/tc/tc4", "GCC_10_3", "2",
+                    ("arm/rse/tc/tc4", "GCC_13_2", "2",
                      "OFF", "OFF", "Debug", True, "", ""),
                     # RSE_TC4_GCC_2_RegBL1_1_Debug_BL2
-                    ("arm/rse/tc/tc4", "GCC_10_3", "2",
+                    ("arm/rse/tc/tc4", "GCC_13_2", "2",
                      "RegBL1_1", "OFF", "Debug", True, "", ""),
                     # RSE_TC4_GCC_2_Release_BL2_ATTESTATION_SCHEME_CCA
-                    ("arm/rse/tc/tc4", "GCC_10_3", "2",
+                    ("arm/rse/tc/tc4", "GCC_13_2", "2",
                      "OFF", "OFF", "Release", True, "", "ATTESTATION_SCHEME_CCA"),
                     # RSE_TC4_GCC_2_RegS_RegNS_MinSizeRel_BL2_RSE_COPY_USE_ROM_LIB_IN_SRAM
-                    ("arm/rse/tc/tc4", "GCC_10_3", "2",
+                    ("arm/rse/tc/tc4", "GCC_13_2", "2",
                      "RegS, RegNS", "OFF", "MinSizeRel", True, "", "RSE_COPY_USE_ROM_LIB_IN_SRAM"),
                     # RSE_RDV3_GCC_2_Release_BL2_NSOFF_CFG0
-                    ("arm/rse/neoverse_rd/rdv3", "GCC_10_3", "2",
+                    ("arm/rse/neoverse_rd/rdv3", "GCC_13_2", "2",
                      "OFF", "OFF", "Release", True, "", "NSOFF, CFG0"),
                     # RSE_RDV3R1_GCC_2_Release_BL2_NSOFF_CFG0
-                    ("arm/rse/neoverse_rd/rdv3r1", "GCC_10_3", "2",
+                    ("arm/rse/neoverse_rd/rdv3r1", "GCC_13_2", "2",
                      "OFF", "OFF", "Release", True, "", "NSOFF, CFG0"),
                     # RSE_RD1AE_GCC_2_Release_BL2_NSOFF
-                    ("arm/rse/automotive_rd/rd1ae", "GCC_10_3", "2",
+                    ("arm/rse/automotive_rd/rd1ae", "GCC_13_2", "2",
                      "OFF", "OFF", "Release", True, "", "NSOFF"),
                     # stm32l562e_dk_ARMCLANG_1_RegS_RegNS_Release_BL2_CRYPTO_OFF
                     ("stm/stm32l562e_dk", "ARMCLANG_6_21", "1",
@@ -1117,16 +1117,13 @@
                 "cmake_build_type": ["Debug", "Release"],
                 "with_bl2":         [True],
                 "profile":          [""],
-                "extra_params":     ["ATTESTATION_SCHEME_DPE", "RSE_PROVISIONING_ASYMMETRIC"]
+                "extra_params":     ["ATTESTATION_SCHEME_DPE", "RSE_PROVISIONING_SYMMETRIC"]
                 },
                 "common_params": _common_tfm_builder_cfg,
                 "invalid": _common_tfm_invalid_configs + [
                     # BL2 is too large for RSE in Debug builds with tests
                     ("arm/rse/tc/tc4", "GCC_10_3", "*", "RegBL2, RegS, RegNS", "*",
                      "Debug", True, "*", "*"),
-                    # BL1_1 tests only support symmetric provisioning config
-                    ("arm/rse/tc/tc4", "*", "*", "RegBL1_1", "*",
-                     "*", True, "*", "RSE_PROVISIONING_ASYMMETRIC"),
                 ],
                 "valid": [
                     ("arm/rse/tc/tc4", "*", "*", "*", "*",