| Divin Raj | 5eb6948 | 2024-10-02 11:36:04 +0100 | [diff] [blame] | 1 | #!/usr/bin/env bash |
| 2 | # |
| 3 | # Copyright (c) 2024, Arm Limited. All rights reserved. |
| 4 | # |
| 5 | # SPDX-License-Identifier: BSD-3-Clause |
| 6 | # |
| 7 | |
| Boyan Karatotev | 52fc8a1 | 2025-02-27 16:56:39 +0000 | [diff] [blame] | 8 | if upon "$local_ci"; then |
| 9 | set_model_path "$warehouse/SysGen/SubSystemModels/$model_version/$model_build/models/$model_flavour/FVP_RD_1_AE" |
| Divin Raj | 5eb6948 | 2024-10-02 11:36:04 +0100 | [diff] [blame] | 10 | else |
| 11 | source "$ci_root/fvp_utils.sh" |
| 12 | # fvp_models variable contains the information for FVP paths, where 2nd field |
| 13 | # points to the /opt/model/*/models/${model_flavour} |
| 14 | models_dir="$(echo ${fvp_models[$model]} | awk -F ';' '{print $2}')" |
| 15 | set_model_path "$models_dir" |
| 16 | fi |
| 17 | |
| 18 | # Write model command line options |
| 19 | cat <<EOF >"$model_param_file" |
| 20 | -C css.sysctrl.scp.terminal_uart_scp.start_port=5007 |
| 21 | -C css.ap_periph.terminal_ns_uart0.start_port=5008 |
| 22 | -C css.ap_periph.terminal_sec_uart.start_port=5009 |
| 23 | -C ros.disable_visualisation=1 |
| 24 | -C css.sysctrl.si.disable_visualisation=1 |
| 25 | -C css.sysctrl.rse.rom.raw_image=$rse_rom_bin |
| 26 | -C css.sysctrl.rse_flashloader.fname=$rse_flash_bin |
| 27 | -C ros.board.flashloader0.fname=$fip_gpt_bin |
| 28 | -C ros.board.virtioblockdevice.image_path=$rootfs_bin |
| 29 | -C ros.board.virtio_net.enabled=1 |
| 30 | -C ros.board.virtio_net.hostbridge.userNetworking=1 |
| 31 | -C ros.board.virtio_net.hostbridge.userNetPorts=2222=22 |
| 32 | -C ros.board.virtio_net.transport=legacy |
| 33 | -C ros.board.virtio_rng.enabled=1 |
| 34 | -C ros.dram_size=0x100000000 |
| 35 | -C css.sysctrl.rse.DISABLE_GATING=1 |
| 36 | -C css.sysctrl.rse.CMU4_NUM_DB_CH=6 |
| 37 | -C css.sysctrl.si.system_ctrl_regs.cl1_c1_cfgrvbaraddr=0x140000000 |
| 38 | -C css.sysctrl.si.system_ctrl_regs.cl2_c1_cfgrvbaraddr=0x160000000 |
| 39 | -C css.sysctrl.si.system_ctrl_regs.cl2_c2_cfgrvbaraddr=0x160000000 |
| 40 | -C css.sysctrl.si.system_ctrl_regs.cl2_c3_cfgrvbaraddr=0x160000000 |
| 41 | -C 'pcie_group_0.pcie4.hierarchy_file_name=<default>' |
| 42 | -C pcie_group_0.pcie4.pcie_rc.ahci0.endpoint.ats_supported=true |
| 43 | -C pcie_group_0.pcie4.pcie_rc.ahci0.ahci.image_path= |
| 44 | -C pcie_group_0.pcie4.pci_smmuv3.mmu.SMMU_ROOT_IDR0=0 |
| 45 | -C css.sysctrl.rse_flashloader.fnameWrite=$rse_flash_bin |
| 46 | -C ros.board.flashloader0.fnameWrite=$fip_gpt_bin |
| 47 | -C css.sysctrl.rse_flashloader.write_flash_after_reset=true |
| 48 | -C ros.board.flashloader0.write_flash_after_reset=true |
| 49 | -C css.sysctrl.rse.lcm_nvm.otp_enabled=1 |
| 50 | -C css.sysctrl.rse.lcm_nvm.read_from_file=1 |
| 51 | -C css.sysctrl.rse.lcm_nvm.update_raw_image=1 |
| 52 | -C css.sysctrl.rse.lcm_nvm.use_image_file=1 |
| 53 | -C css.sysctrl.rse.clk_mul.mul=5 |
| 54 | -C css.sysctrl.rse.intchecker.ICBC_RESET_VALUE=0x0000011B |
| 55 | --data css.sysctrl.rse.cpu=$rse_encrypted_cm_provisioning_bundle_0_bin@0x31000400 |
| 56 | --data css.sysctrl.rse.cpu=$rse_encrypted_dm_provisioning_bundle_bin@0x31080000 |
| 57 | |
| 58 | EOF |