diff --git a/tf_config/fvp-mte-tsp b/tf_config/fvp-mte-tsp
index 7b4c14a..2e7d13a 100644
--- a/tf_config/fvp-mte-tsp
+++ b/tf_config/fvp-mte-tsp
@@ -1,4 +1,4 @@
 CROSS_COMPILE=aarch64-none-elf-
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 PLAT=fvp
 SPD=tspd
diff --git a/tf_config/fvp-spm b/tf_config/fvp-spm
index f370e60..6e6dfb8 100644
--- a/tf_config/fvp-spm
+++ b/tf_config/fvp-spm
@@ -5,7 +5,7 @@
 CTX_INCLUDE_EL2_REGS=1
 ARM_ARCH_MINOR=5
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 BRANCH_PROTECTION=1
 SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
 GIC_EXT_INTID=1
diff --git a/tf_config/fvp-spm-hyp b/tf_config/fvp-spm-hyp
index 01de164..41fc2d9 100644
--- a/tf_config/fvp-spm-hyp
+++ b/tf_config/fvp-spm-hyp
@@ -7,7 +7,7 @@
 CTX_INCLUDE_EL2_REGS=1
 ARM_ARCH_MINOR=5
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 BRANCH_PROTECTION=1
 SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
 GIC_EXT_INTID=1
diff --git a/tf_config/fvp-spm-measured-boot b/tf_config/fvp-spm-measured-boot
index 1ae2511..6f4516e 100644
--- a/tf_config/fvp-spm-measured-boot
+++ b/tf_config/fvp-spm-measured-boot
@@ -5,7 +5,7 @@
 CTX_INCLUDE_EL2_REGS=1
 ARM_ARCH_MINOR=5
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 BRANCH_PROTECTION=1
 SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
 MEASURED_BOOT=1
diff --git a/tf_config/fvp-spm-optee-sp b/tf_config/fvp-spm-optee-sp
index 790d1d7..9d4833f 100644
--- a/tf_config/fvp-spm-optee-sp
+++ b/tf_config/fvp-spm-optee-sp
@@ -1,6 +1,6 @@
 ARM_ARCH_MINOR=5
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 BRANCH_PROTECTION=1
 ARM_SPMC_MANIFEST_DTS=plat/arm/board/fvp/fdts/fvp_spmc_optee_sp_manifest.dts
 CROSS_COMPILE=aarch64-none-elf-
diff --git a/tf_config/fvp-spm-report-ctx-mem-use b/tf_config/fvp-spm-report-ctx-mem-use
index 41a558a..6ed9ea3 100644
--- a/tf_config/fvp-spm-report-ctx-mem-use
+++ b/tf_config/fvp-spm-report-ctx-mem-use
@@ -5,7 +5,7 @@
 CTX_INCLUDE_EL2_REGS=1
 ARM_ARCH_MINOR=5
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 BRANCH_PROTECTION=1
 SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
 PLATFORM_REPORT_CTX_MEM_USE=1
diff --git a/tf_config/fvp-spm-rme b/tf_config/fvp-spm-rme
index 7b92352..4661018 100644
--- a/tf_config/fvp-spm-rme
+++ b/tf_config/fvp-spm-rme
@@ -6,7 +6,7 @@
 SPMD_SPM_AT_SEL2=1
 BRANCH_PROTECTION=1
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
 GIC_EXT_INTID=1
 PLAT_TEST_SPM=1
diff --git a/tf_config/fvp-spm-rst-bl31 b/tf_config/fvp-spm-rst-bl31
index 7f29d8d..7c79386 100644
--- a/tf_config/fvp-spm-rst-bl31
+++ b/tf_config/fvp-spm-rst-bl31
@@ -9,7 +9,7 @@
 CTX_INCLUDE_EL2_REGS=1
 ARM_ARCH_MINOR=5
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 BRANCH_PROTECTION=1
 SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
 GIC_EXT_INTID=1
diff --git a/tf_config/fvp-spm-spmd-lsp b/tf_config/fvp-spm-spmd-lsp
index 737eb29..18b71f2 100644
--- a/tf_config/fvp-spm-spmd-lsp
+++ b/tf_config/fvp-spm-spmd-lsp
@@ -4,7 +4,7 @@
 ENABLE_SPMD_LP=1
 ARM_ARCH_MINOR=5
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 BRANCH_PROTECTION=1
 SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
 GIC_EXT_INTID=1
diff --git a/tf_config/fvp-spm-sve b/tf_config/fvp-spm-sve
index dd44042..a7bb493 100644
--- a/tf_config/fvp-spm-sve
+++ b/tf_config/fvp-spm-sve
@@ -4,7 +4,7 @@
 BRANCH_PROTECTION=1
 CTX_INCLUDE_EL2_REGS=1
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 ENABLE_SVE_FOR_NS=1
 ENABLE_SVE_FOR_SWD=1
 SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
diff --git a/tf_config/fvp-spm-tbb b/tf_config/fvp-spm-tbb
index 4bdc0c3..fd42fb9 100644
--- a/tf_config/fvp-spm-tbb
+++ b/tf_config/fvp-spm-tbb
@@ -5,7 +5,7 @@
 CTX_INCLUDE_EL2_REGS=1
 ARM_ARCH_MINOR=5
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 BRANCH_PROTECTION=1
 SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
 ARM_ROTPK_LOCATION=devel_rsa
diff --git a/tf_config/fvp-spm-tbb-dualroot b/tf_config/fvp-spm-tbb-dualroot
index fd25f05..9970675 100644
--- a/tf_config/fvp-spm-tbb-dualroot
+++ b/tf_config/fvp-spm-tbb-dualroot
@@ -5,7 +5,7 @@
 CTX_INCLUDE_EL2_REGS=1
 ARM_ARCH_MINOR=5
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 BRANCH_PROTECTION=1
 SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
 ARM_ROTPK_LOCATION=devel_rsa
diff --git a/tf_config/fvp-tbb-mbedtls-mb-spm-rme b/tf_config/fvp-tbb-mbedtls-mb-spm-rme
index 9e4d39a..278edb2 100644
--- a/tf_config/fvp-tbb-mbedtls-mb-spm-rme
+++ b/tf_config/fvp-tbb-mbedtls-mb-spm-rme
@@ -1,7 +1,7 @@
 ARM_ROTPK_LOCATION=devel_rsa
 BRANCH_PROTECTION=1
 CROSS_COMPILE=aarch64-none-elf-
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 CTX_INCLUDE_PAUTH_REGS=1
 ENABLE_RME=1
 FVP_TRUSTED_SRAM_SIZE=384
diff --git a/tf_config/fvp-tc2-spm b/tf_config/fvp-tc2-spm
index c164d2f..555ed3d 100644
--- a/tf_config/fvp-tc2-spm
+++ b/tf_config/fvp-tc2-spm
@@ -3,7 +3,7 @@
 CROSS_COMPILE=aarch64-none-elf-
 CTX_INCLUDE_EL2_REGS=1
 CTX_INCLUDE_PAUTH_REGS=1
-CTX_INCLUDE_MTE_REGS=1
+ENABLE_FEAT_MTE=1
 ENABLE_SVE_FOR_SWD=1
 PLAT=tc
 SCP_BL2=/dev/null