diff --git a/expect/crash_rng_trap_unhandled_exception_at_el3.exp b/expect/crash_rng_trap_unhandled_exception_at_el3.exp
new file mode 100644
index 0000000..9efd7b5
--- /dev/null
+++ b/expect/crash_rng_trap_unhandled_exception_at_el3.exp
@@ -0,0 +1,91 @@
+#
+# Copyright (c) 2022, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+# Expect script for Trusted Firmware Test Framework
+#
+
+source [file join [file dirname [info script]] handle-arguments.inc]
+
+expect_string "Unhandled Exception in EL3."
+expect_string "x30"
+expect_string "x0"
+expect_string "x1"
+expect_string "x2"
+expect_string "x3"
+expect_string "x4"
+expect_string "x5"
+expect_string "x6"
+expect_string "x7"
+expect_string "x8"
+expect_string "x9"
+expect_string "x10"
+expect_string "x11"
+expect_string "x12"
+expect_string "x13"
+expect_string "x14"
+expect_string "x15"
+expect_string "x16"
+expect_string "x17"
+expect_string "x18"
+expect_string "x19"
+expect_string "x20"
+expect_string "x21"
+expect_string "x22"
+expect_string "x23"
+expect_string "x24"
+expect_string "x25"
+expect_string "x26"
+expect_string "x27"
+expect_string "x28"
+expect_string "x29"
+expect_string "scr_el3"
+expect_string "sctlr_el3"
+expect_string "cptr_el3"
+expect_string "tcr_el3"
+expect_string "daif"
+expect_string "mair_el3"
+expect_string "spsr_el3"
+expect_string "elr_el3"
+expect_string "ttbr0_el3"
+expect_string "esr_el3"
+expect_string "far_el3"
+expect_string "spsr_el1"
+expect_string "elr_el1"
+expect_string "spsr_abt"
+expect_string "spsr_und"
+expect_string "spsr_irq"
+expect_string "spsr_fiq"
+expect_string "sctlr_el1"
+expect_string "actlr_el1"
+expect_string "cpacr_el1"
+expect_string "csselr_el1"
+expect_string "sp_el1"
+expect_string "esr_el1"
+expect_string "ttbr0_el1"
+expect_string "ttbr1_el1"
+expect_string "mair_el1"
+expect_string "amair_el1"
+expect_string "tcr_el1"
+expect_string "tpidr_el1"
+expect_string "tpidr_el0"
+expect_string "tpidrro_el0"
+expect_string "par_el1"
+expect_string "mpidr_el1"
+expect_string "afsr0_el1"
+expect_string "afsr1_el1"
+expect_string "contextidr_el1"
+expect_string "vbar_el1"
+expect_string "cntp_ctl_el0"
+expect_string "cntp_cval_el0"
+expect_string "cntv_ctl_el0"
+expect_string "cntv_cval_el0"
+expect_string "cntkctl_el1"
+expect_string "sp_el0"
+expect_string "isr_el1"
+expect_string "dacr32_el2"
+expect_string "ifsr32_el2"
+expect_string "icc_hppir0_el1"
+expect_string "icc_hppir1_el1"
+expect_string "icc_ctlr_el3"
diff --git a/group/tf-l2-boot-tests-misc/fvp-default-rng-trap,fvp-rndr-trap:fvp-tftf-fip.tftf-aemv8a.rng_trap.bl31_panic-debug b/group/tf-l2-boot-tests-misc/fvp-default-rng-trap,fvp-rndr-trap:fvp-tftf-fip.tftf-aemv8a.rng_trap.bl31_panic-debug
new file mode 100644
index 0000000..b8939c8
--- /dev/null
+++ b/group/tf-l2-boot-tests-misc/fvp-default-rng-trap,fvp-rndr-trap:fvp-tftf-fip.tftf-aemv8a.rng_trap.bl31_panic-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2022, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/group/tf-l2-boot-tests-misc/fvp-default-rng-trap,fvp-rndrrs-trap:fvp-tftf-fip.tftf-aemv8a.rng_trap.bl31_panic-debug b/group/tf-l2-boot-tests-misc/fvp-default-rng-trap,fvp-rndrrs-trap:fvp-tftf-fip.tftf-aemv8a.rng_trap.bl31_panic-debug
new file mode 100644
index 0000000..b8939c8
--- /dev/null
+++ b/group/tf-l2-boot-tests-misc/fvp-default-rng-trap,fvp-rndrrs-trap:fvp-tftf-fip.tftf-aemv8a.rng_trap.bl31_panic-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2022, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/model/base-aemva-common.sh b/model/base-aemva-common.sh
index 9afec2e..db76fa5 100644
--- a/model/base-aemva-common.sh
+++ b/model/base-aemva-common.sh
@@ -65,6 +65,12 @@
 # Enable FEAT_RME
 reset_var has_rme
 
+# Enable FEAT_RNG
+reset_var has_rng
+
+# Enable FEAT_RNG_TRAP
+reset_var has_rng_trap
+
 # Layout of MPIDR. 0=AFF0 is CPUID, 1=AFF1 is CPUID
 reset_var mpidr_layout
 
@@ -293,6 +299,12 @@
 EOF
 fi
 
+if [ "$arch_version" = "8.8" ]; then
+	cat <<EOF >>"$model_param_file"
+-C cluster0.has_arm_v8-8=1
+EOF
+fi
+
 # Parameters for fault injection
 if [ "$fault_inject" = "1" ]; then
 	cat <<EOF >>"$model_param_file"
@@ -332,6 +344,20 @@
 EOF
 fi
 
+# FEAT_RNG is enabled
+if [ "$has_rng" = "1" ]; then
+	cat <<EOF >>"$model_param_file"
+-C cluster0.has_rndr=1
+EOF
+fi
+
+# FEAT_RNG_TRAP is enabled
+if [ "$has_rng_trap" = "1" ]; then
+	cat <<EOF >>"$model_param_file"
+-C cluster0.has_rndr_trap=1
+EOF
+fi
+
 #------------ Cluster1 configuration (if exists) --------------
 if [ "$is_dual_cluster" = "1" ]; then
 	cat <<EOF >>"$model_param_file"
@@ -428,6 +454,12 @@
 EOF
 fi
 
+if [ "$arch_version" = "8.8" ]; then
+	cat <<EOF >>"$model_param_file"
+-C cluster1.has_arm_v8-8=1
+EOF
+fi
+
 # Parameters for fault injection
 if [ "$fault_inject" = "1" ]; then
 	cat <<EOF >>"$model_param_file"
@@ -466,6 +498,21 @@
 -C cluster1.PA_SIZE=48
 EOF
 fi
+
+# FEAT_RNG is enabled
+if [ "$has_rng" = "1" ]; then
+	cat <<EOF >>"$model_param_file"
+-C cluster1.has_rndr=1
+EOF
+fi
+
+# FEAT_RNG_TRAP is enabled
+if [ "$has_rng_trap" = "1" ]; then
+	cat <<EOF >>"$model_param_file"
+-C cluster1.has_rndr_trap=1
+EOF
+fi
+
 fi
 
 # 48bit PA size: in order to access memory in high address ranges the
diff --git a/run_config/fvp-aemv8a.rng_trap.bl31_panic b/run_config/fvp-aemv8a.rng_trap.bl31_panic
new file mode 100644
index 0000000..b6dcad2
--- /dev/null
+++ b/run_config/fvp-aemv8a.rng_trap.bl31_panic
@@ -0,0 +1,26 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2022, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+post_tf_archive() {
+        local model="base-aemv8a"
+
+	model="$model" \
+	# Due to a bug in the model, the FEAT_RNG_TRAP feature is not available
+	# in models that implement versions lower than 8.8, even though this is
+	# a v8.5 feature. Therefore, version 8.8 will be used while the FVP
+	# team fixes this problem. Once ready, the parameter arch_version will
+	# be changed to 8.5.
+	arch_version="8.8"  \
+	has_rng_trap="1" \
+	gen_model_params
+	model="$model" gen_fvp_yaml
+}
+
+fetch_tf_resource() {
+	uart="0" timeout="60" file="timeout.exp" track_expect
+	uart="1" timeout="60" file="crash_rng_trap_unhandled_exception_at_el3.exp" track_expect
+}
diff --git a/tf_config/fvp-default-rng-trap b/tf_config/fvp-default-rng-trap
new file mode 100644
index 0000000..0db59cf
--- /dev/null
+++ b/tf_config/fvp-default-rng-trap
@@ -0,0 +1,7 @@
+ARM_ARCH_FEATURE=rng
+ARM_ARCH_MAJOR=8
+ARM_ARCH_MINOR=5
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_FEAT_RNG=1
+ENABLE_FEAT_RNG_TRAP=1
+PLAT=fvp
diff --git a/tftf_config/fvp-rndr-trap b/tftf_config/fvp-rndr-trap
new file mode 100644
index 0000000..0f666ab
--- /dev/null
+++ b/tftf_config/fvp-rndr-trap
@@ -0,0 +1,6 @@
+ARM_ARCH_FEATURE=rng
+ARM_ARCH_MAJOR=8
+ARM_ARCH_MINOR=5
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+TESTS=rndr_trap
diff --git a/tftf_config/fvp-rndrrs-trap b/tftf_config/fvp-rndrrs-trap
new file mode 100644
index 0000000..35ef6ee
--- /dev/null
+++ b/tftf_config/fvp-rndrrs-trap
@@ -0,0 +1,6 @@
+ARM_ARCH_FEATURE=rng
+ARM_ARCH_MAJOR=8
+ARM_ARCH_MINOR=5
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+TESTS=rndrrs_trap