feat(mte): enable MTE support in SPM tests
Adds MTE support parameters to FVP models.
Enables MTE support in relevant tf-a builds.
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
Change-Id: Ib31275b165d955c308af8ffcb38a532a2d3357dc
diff --git a/model/base-aemva-common.sh b/model/base-aemva-common.sh
index 2cc80fb..1187d61 100644
--- a/model/base-aemva-common.sh
+++ b/model/base-aemva-common.sh
@@ -128,6 +128,13 @@
EOF
fi
+# MTE is enabled
+if [[ -n $memory_tagging_support_level ]]; then
+ cat <<EOF >>"$model_param_file"
+-C bp.dram_metadata.is_enabled=1
+EOF
+fi
+
#------------ Cluster0 configuration --------------
cat <<EOF >>"$model_param_file"
diff --git a/run_config/fvp-spm b/run_config/fvp-spm
index cb0a5ec..7d13362 100644
--- a/run_config/fvp-spm
+++ b/run_config/fvp-spm
@@ -1,6 +1,6 @@
#!/usr/bin/env bash
#
-# Copyright (c) 2020-2021, Arm Limited. All rights reserved.
+# Copyright (c) 2020-2022, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -31,6 +31,7 @@
has_smmuv3_params="1" \
has_branch_target_exception="1" \
restriction_on_speculative_execution="2" \
+ memory_tagging_support_level="2" \
gen_model_params
model="$model" gen_fvp_yaml
diff --git a/run_config/fvp-spm+romlib b/run_config/fvp-spm+romlib
index 2334371..2a4e4ad 100644
--- a/run_config/fvp-spm+romlib
+++ b/run_config/fvp-spm+romlib
@@ -1,6 +1,6 @@
#!/usr/bin/env bash
#
-# Copyright (c) 2021, Arm Limited. All rights reserved.
+# Copyright (c) 2021-2022, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -32,6 +32,7 @@
has_smmuv3_params="1" \
has_branch_target_exception="1" \
restriction_on_speculative_execution="2" \
+ memory_tagging_support_level="2" \
gen_model_params
model="$model" gen_fvp_yaml
diff --git a/run_config/fvp-spm.linux b/run_config/fvp-spm.linux
index 32b0c88..20b8552 100644
--- a/run_config/fvp-spm.linux
+++ b/run_config/fvp-spm.linux
@@ -1,6 +1,6 @@
#!/usr/bin/env bash
#
-# Copyright (c) 2020-2021, Arm Limited. All rights reserved.
+# Copyright (c) 2020-2022, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -38,6 +38,7 @@
kernel_addr=0x88000000 \
kernel_bin="$archive/hafnium.bin" \
has_smmuv3_params="1" \
+ memory_tagging_support_level="2" \
gen_model_params
model="$model" model_dtb="manifest.dtb" gen_fvp_yaml
diff --git a/run_config/fvp-spm.optee.sp b/run_config/fvp-spm.optee.sp
index 5b5d6dc..65e6fa0 100644
--- a/run_config/fvp-spm.optee.sp
+++ b/run_config/fvp-spm.optee.sp
@@ -1,6 +1,6 @@
#!/usr/bin/env bash
#
-# Copyright (c) 2020-2021, Arm Limited. All rights reserved.
+# Copyright (c) 2020-2022, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -39,6 +39,7 @@
has_smmuv3_params="1" \
has_branch_target_exception="1" \
restriction_on_speculative_execution="2" \
+ memory_tagging_support_level="2" \
gen_model_params
model="$model" gen_fvp_yaml
diff --git a/run_config/fvp-spm.rstbl31 b/run_config/fvp-spm.rstbl31
index d4afdc6..ccc1330 100644
--- a/run_config/fvp-spm.rstbl31
+++ b/run_config/fvp-spm.rstbl31
@@ -1,6 +1,6 @@
#!/usr/bin/env bash
#
-# Copyright (c) 2020-2021, Arm Limited. All rights reserved.
+# Copyright (c) 2020-2022, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -65,6 +65,7 @@
sp3_pkg="cactus-tertiary.pkg" \
sp4_pkg="ivy.pkg" \
has_smmuv3_params="1" \
+ memory_tagging_support_level="2" \
gen_model_params
model="$model" gen_fvp_yaml
diff --git a/run_config/fvp-spm.sve+amu b/run_config/fvp-spm.sve+amu
index fb77b2d..9ab697f 100644
--- a/run_config/fvp-spm.sve+amu
+++ b/run_config/fvp-spm.sve+amu
@@ -1,6 +1,6 @@
#!/usr/bin/env bash
#
-# Copyright (c) 2021, Arm Limited. All rights reserved.
+# Copyright (c) 2021-2022, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -33,6 +33,7 @@
has_smmuv3_params="1" \
has_branch_target_exception="1" \
restriction_on_speculative_execution="2" \
+ memory_tagging_support_level="2" \
gen_model_params
model="$model" gen_fvp_yaml
diff --git a/run_config/fvp-tc0.spm.tftf b/run_config/fvp-tc0.spm.tftf
index 08c31ae..7fa1b06 100644
--- a/run_config/fvp-tc0.spm.tftf
+++ b/run_config/fvp-tc0.spm.tftf
@@ -32,7 +32,9 @@
post_fetch_tf_resource() {
local model="tc0"
- model="$model" gen_model_params
+ model="$model" \
+ memory_tagging_support_level="2" \
+ gen_model_params
set_run_env "ports_script" "$ci_root/model/tc-ports.awk"
set_run_env "num_uarts" "2"
diff --git a/run_config/fvp-tftf.rme b/run_config/fvp-tftf.rme
index 185c1ea..48e3921 100644
--- a/run_config/fvp-tftf.rme
+++ b/run_config/fvp-tftf.rme
@@ -1,6 +1,6 @@
#!/usr/bin/env bash
#
-# Copyright (c) 2021, Arm Limited. All rights reserved.
+# Copyright (c) 2021-2022, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -31,6 +31,7 @@
amu_present="1" \
has_rme="1" \
has_smmuv3_params="1" \
+ memory_tagging_support_level="2" \
gen_model_params
model="$model" gen_fvp_yaml
diff --git a/tf_config/fvp-spm b/tf_config/fvp-spm
index a0ceae5..39cd1d1 100644
--- a/tf_config/fvp-spm
+++ b/tf_config/fvp-spm
@@ -5,5 +5,6 @@
CTX_INCLUDE_EL2_REGS=1
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
+CTX_INCLUDE_MTE_REGS=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
diff --git a/tf_config/fvp-spm-hyp b/tf_config/fvp-spm-hyp
index f28c804..ed57c1f 100644
--- a/tf_config/fvp-spm-hyp
+++ b/tf_config/fvp-spm-hyp
@@ -7,5 +7,6 @@
CTX_INCLUDE_EL2_REGS=1
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
+CTX_INCLUDE_MTE_REGS=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
diff --git a/tf_config/fvp-spm-optee-sp b/tf_config/fvp-spm-optee-sp
index 95fc011..caed5fb 100644
--- a/tf_config/fvp-spm-optee-sp
+++ b/tf_config/fvp-spm-optee-sp
@@ -1,5 +1,6 @@
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
+CTX_INCLUDE_MTE_REGS=1
BRANCH_PROTECTION=1
ARM_SPMC_MANIFEST_DTS=plat/arm/board/fvp/fdts/fvp_spmc_optee_sp_manifest.dts
CROSS_COMPILE=aarch64-none-elf-
diff --git a/tf_config/fvp-spm-rme b/tf_config/fvp-spm-rme
index 8d8446d..3dbf23a 100644
--- a/tf_config/fvp-spm-rme
+++ b/tf_config/fvp-spm-rme
@@ -6,4 +6,5 @@
SPMD_SPM_AT_SEL2=1
BRANCH_PROTECTION=1
CTX_INCLUDE_PAUTH_REGS=1
+CTX_INCLUDE_MTE_REGS=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
diff --git a/tf_config/fvp-spm-rst-bl31 b/tf_config/fvp-spm-rst-bl31
index 88ce5dc..1ec49d2 100644
--- a/tf_config/fvp-spm-rst-bl31
+++ b/tf_config/fvp-spm-rst-bl31
@@ -9,5 +9,6 @@
CTX_INCLUDE_EL2_REGS=1
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
+CTX_INCLUDE_MTE_REGS=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
diff --git a/tf_config/fvp-spm-sve b/tf_config/fvp-spm-sve
index dbe3787..2b732b9 100644
--- a/tf_config/fvp-spm-sve
+++ b/tf_config/fvp-spm-sve
@@ -4,6 +4,7 @@
BRANCH_PROTECTION=1
CTX_INCLUDE_EL2_REGS=1
CTX_INCLUDE_PAUTH_REGS=1
+CTX_INCLUDE_MTE_REGS=1
ENABLE_SVE_FOR_NS=1
ENABLE_SVE_FOR_SWD=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
diff --git a/tf_config/fvp-spm-tbb b/tf_config/fvp-spm-tbb
index 5fa94ea..6b875a1 100644
--- a/tf_config/fvp-spm-tbb
+++ b/tf_config/fvp-spm-tbb
@@ -5,6 +5,7 @@
CTX_INCLUDE_EL2_REGS=1
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
+CTX_INCLUDE_MTE_REGS=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
ARM_ROTPK_LOCATION=devel_rsa
diff --git a/tf_config/fvp-spm-tbb-dualroot b/tf_config/fvp-spm-tbb-dualroot
index 53c0428..17f982c 100644
--- a/tf_config/fvp-spm-tbb-dualroot
+++ b/tf_config/fvp-spm-tbb-dualroot
@@ -5,6 +5,7 @@
CTX_INCLUDE_EL2_REGS=1
ARM_ARCH_MINOR=5
CTX_INCLUDE_PAUTH_REGS=1
+CTX_INCLUDE_MTE_REGS=1
BRANCH_PROTECTION=1
SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
ARM_ROTPK_LOCATION=devel_rsa
diff --git a/tf_config/fvp-tc0-spm b/tf_config/fvp-tc0-spm
index ba746ab..7b63e1f 100644
--- a/tf_config/fvp-tc0-spm
+++ b/tf_config/fvp-tc0-spm
@@ -3,6 +3,7 @@
CROSS_COMPILE=aarch64-none-elf-
CTX_INCLUDE_EL2_REGS=1
CTX_INCLUDE_PAUTH_REGS=1
+CTX_INCLUDE_MTE_REGS=1
ENABLE_SVE_FOR_SWD=1
PLAT=tc
SCP_BL2=/dev/null