diff --git a/group/tf-l1-build-plat/diphda-fpga-default:nil b/group/tf-l1-build-plat/diphda-fpga-default:nil
new file mode 100644
index 0000000..45065d8
--- /dev/null
+++ b/group/tf-l1-build-plat/diphda-fpga-default:nil
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2021 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/script/tf-coverity/tf-cov-make b/script/tf-coverity/tf-cov-make
index ffaa176..ee684cf 100755
--- a/script/tf-coverity/tf-cov-make
+++ b/script/tf-coverity/tf-cov-make
@@ -270,6 +270,25 @@
 #
 make $(common_flags) PLAT=morello all
 
+#
+# diphda Platform
+#
+
+make $(common_flags) \
+     PLAT=diphda \
+     SPD=spmd \
+     TARGET_PLATFORM=fpga \
+     ENABLE_STACK_PROTECTOR=strong \
+     ENABLE_PIE=1 \
+     BL2_AT_EL3=1 \
+     SPMD_SPM_AT_SEL2=0 \
+     ${ARM_TBB_OPTIONS} \
+     CREATE_KEYS=1 \
+     COT=tbbr \
+     ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem \
+     bl2 \
+     bl31
+
 # Partners' platforms.
 # Enable as many features as possible.
 # We don't need to clean between each build here because we only do one build
diff --git a/tf_config/diphda-fpga-default b/tf_config/diphda-fpga-default
new file mode 100644
index 0000000..303d070
--- /dev/null
+++ b/tf_config/diphda-fpga-default
@@ -0,0 +1,11 @@
+ARM_ROTPK_LOCATION=devel_rsa
+BL2_AT_EL3=1
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_PIE=1
+GENERATE_COT=1
+PLAT=diphda
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+SPD=spmd
+SPMD_SPM_AT_SEL2=0
+TARGET_PLATFORM=fpga
+TRUSTED_BOARD_BOOT=1
\ No newline at end of file