diff --git a/tf_config/fvp-aarch32-default-cc b/tf_config/fvp-aarch32-default-cc
new file mode 100644
index 0000000..bcd11fa
--- /dev/null
+++ b/tf_config/fvp-aarch32-default-cc
@@ -0,0 +1,5 @@
+AARCH32_SP=sp_min
+ARCH=aarch32
+CROSS_COMPILE=arm-none-eabi-
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch32-enable-runtime-instr-cc b/tf_config/fvp-aarch32-enable-runtime-instr-cc
new file mode 100644
index 0000000..36c894a
--- /dev/null
+++ b/tf_config/fvp-aarch32-enable-runtime-instr-cc
@@ -0,0 +1,6 @@
+AARCH32_SP=sp_min
+ARCH=aarch32
+CROSS_COMPILE=arm-none-eabi-
+ENABLE_RUNTIME_INSTRUMENTATION=1
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch32-mtpmu-disable-cc b/tf_config/fvp-aarch32-mtpmu-disable-cc
new file mode 100644
index 0000000..6ce122c
--- /dev/null
+++ b/tf_config/fvp-aarch32-mtpmu-disable-cc
@@ -0,0 +1,7 @@
+AARCH32_SP=sp_min
+ARCH=aarch32
+ARM_ARCH_MINOR=6
+CROSS_COMPILE=arm-none-eabi-
+DISABLE_MTPMU=1
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch32-roxlattables-cc b/tf_config/fvp-aarch32-roxlattables-cc
new file mode 100644
index 0000000..88b6159
--- /dev/null
+++ b/tf_config/fvp-aarch32-roxlattables-cc
@@ -0,0 +1,6 @@
+AARCH32_SP=sp_min
+ARCH=aarch32
+CROSS_COMPILE=arm-none-eabi-
+PLAT=fvp
+ALLOW_RO_XLAT_TABLES=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch32-sec-int-fconf-cc b/tf_config/fvp-aarch32-sec-int-fconf-cc
new file mode 100644
index 0000000..5cc58ef
--- /dev/null
+++ b/tf_config/fvp-aarch32-sec-int-fconf-cc
@@ -0,0 +1,6 @@
+AARCH32_SP=sp_min
+ARCH=aarch32
+CROSS_COMPILE=arm-none-eabi-
+PLAT=fvp
+SEC_INT_DESC_IN_FCONF=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch32-tbb-mbedtls-cc b/tf_config/fvp-aarch32-tbb-mbedtls-cc
new file mode 100644
index 0000000..92eb268
--- /dev/null
+++ b/tf_config/fvp-aarch32-tbb-mbedtls-cc
@@ -0,0 +1,9 @@
+AARCH32_SP=sp_min
+ARCH=aarch32
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=arm-none-eabi-
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch32-tbb-mbedtls-dualroot-cc b/tf_config/fvp-aarch32-tbb-mbedtls-dualroot-cc
new file mode 100644
index 0000000..9cf6e78
--- /dev/null
+++ b/tf_config/fvp-aarch32-tbb-mbedtls-dualroot-cc
@@ -0,0 +1,10 @@
+AARCH32_SP=sp_min
+ARCH=aarch32
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=arm-none-eabi-
+COT=dualroot
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch32-tbb-mbedtls-ecdsa-cc b/tf_config/fvp-aarch32-tbb-mbedtls-ecdsa-cc
new file mode 100644
index 0000000..ec60df4
--- /dev/null
+++ b/tf_config/fvp-aarch32-tbb-mbedtls-ecdsa-cc
@@ -0,0 +1,10 @@
+AARCH32_SP=sp_min
+ARCH=aarch32
+ARM_ROTPK_LOCATION=devel_ecdsa
+CROSS_COMPILE=arm-none-eabi-
+GENERATE_COT=1
+KEY_ALG=ecdsa
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_ecdsa.pem
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch32-tbb-mbedtls-rsa-3k-cert-cc b/tf_config/fvp-aarch32-tbb-mbedtls-rsa-3k-cert-cc
new file mode 100644
index 0000000..1e63a50
--- /dev/null
+++ b/tf_config/fvp-aarch32-tbb-mbedtls-rsa-3k-cert-cc
@@ -0,0 +1,10 @@
+AARCH32_SP=sp_min
+ARCH=aarch32
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=arm-none-eabi-
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TRUSTED_BOARD_BOOT=1
+KEY_SIZE=3072
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch32-tbb-mbedtls-rsa-ecdsa-with-ecdsa-rotpk-rsa-cert-cc b/tf_config/fvp-aarch32-tbb-mbedtls-rsa-ecdsa-with-ecdsa-rotpk-rsa-cert-cc
new file mode 100644
index 0000000..f2a662e
--- /dev/null
+++ b/tf_config/fvp-aarch32-tbb-mbedtls-rsa-ecdsa-with-ecdsa-rotpk-rsa-cert-cc
@@ -0,0 +1,11 @@
+AARCH32_SP=sp_min
+ARCH=aarch32
+ARM_ROTPK_LOCATION=devel_ecdsa
+CROSS_COMPILE=arm-none-eabi-
+GENERATE_COT=1
+KEY_ALG=rsa
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_ecdsa.pem
+TF_MBEDTLS_KEY_ALG=rsa+ecdsa
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch64-gicr-protection-cc b/tf_config/fvp-aarch64-gicr-protection-cc
new file mode 100644
index 0000000..4048e92
--- /dev/null
+++ b/tf_config/fvp-aarch64-gicr-protection-cc
@@ -0,0 +1,4 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+FVP_GICR_REGION_PROTECTION=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch64-only-cc b/tf_config/fvp-aarch64-only-cc
new file mode 100644
index 0000000..2d838af
--- /dev/null
+++ b/tf_config/fvp-aarch64-only-cc
@@ -0,0 +1,4 @@
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch64-roxlattables-cc b/tf_config/fvp-aarch64-roxlattables-cc
new file mode 100644
index 0000000..4ebfa80
--- /dev/null
+++ b/tf_config/fvp-aarch64-roxlattables-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+ALLOW_RO_XLAT_TABLES=1
+RECLAIM_INIT_CODE=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch64-roxlattables-tspd-cc b/tf_config/fvp-aarch64-roxlattables-tspd-cc
new file mode 100644
index 0000000..f985ba3
--- /dev/null
+++ b/tf_config/fvp-aarch64-roxlattables-tspd-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+ALLOW_RO_XLAT_TABLES=1
+SPD=tspd
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch64-sdei-cc b/tf_config/fvp-aarch64-sdei-cc
index c98dfbf..4ab5350 100644
--- a/tf_config/fvp-aarch64-sdei-cc
+++ b/tf_config/fvp-aarch64-sdei-cc
@@ -1,5 +1,5 @@
 CROSS_COMPILE=aarch64-none-elf-
 EL3_EXCEPTION_HANDLING=1
-ENABLE_ASSERTIONS=0
 PLAT=fvp
 SDEI_SUPPORT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch64-sdei-fconf-cc b/tf_config/fvp-aarch64-sdei-fconf-cc
new file mode 100644
index 0000000..de7f273
--- /dev/null
+++ b/tf_config/fvp-aarch64-sdei-fconf-cc
@@ -0,0 +1,6 @@
+CROSS_COMPILE=aarch64-none-elf-
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+SDEI_IN_FCONF=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-aarch64-sec-int-fconf-cc b/tf_config/fvp-aarch64-sec-int-fconf-cc
new file mode 100644
index 0000000..4345a0f
--- /dev/null
+++ b/tf_config/fvp-aarch64-sec-int-fconf-cc
@@ -0,0 +1,4 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+SEC_INT_DESC_IN_FCONF=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-bl31-separate-nobits-cc b/tf_config/fvp-bl31-separate-nobits-cc
new file mode 100644
index 0000000..ac87907
--- /dev/null
+++ b/tf_config/fvp-bl31-separate-nobits-cc
@@ -0,0 +1,6 @@
+ARM_BL31_IN_DRAM=1
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+RECLAIM_INIT_CODE=0
+SEPARATE_NOBITS_REGION=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-cas-spinlock-cc b/tf_config/fvp-cas-spinlock-cc
new file mode 100644
index 0000000..a8f38af
--- /dev/null
+++ b/tf_config/fvp-cas-spinlock-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+ARM_ARCH_MINOR=3
+USE_SPINLOCK_CAS=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-crash-report-cc b/tf_config/fvp-crash-report-cc
new file mode 100644
index 0000000..06912d4
--- /dev/null
+++ b/tf_config/fvp-crash-report-cc
@@ -0,0 +1,5 @@
+CRASH_REPORTING=1
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_BACKTRACE=1
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-debugfs-cc b/tf_config/fvp-debugfs-cc
new file mode 100644
index 0000000..fc4a7d1
--- /dev/null
+++ b/tf_config/fvp-debugfs-cc
@@ -0,0 +1,4 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+USE_DEBUGFS=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-default-cc b/tf_config/fvp-default-cc
index 1247532..f18dc14 100644
--- a/tf_config/fvp-default-cc
+++ b/tf_config/fvp-default-cc
@@ -1,3 +1,3 @@
 CROSS_COMPILE=aarch64-none-elf-
-ENABLE_ASSERTIONS=0
 PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-default-clang-bfd-cc b/tf_config/fvp-default-clang-bfd-cc
new file mode 100644
index 0000000..d8b33d4
--- /dev/null
+++ b/tf_config/fvp-default-clang-bfd-cc
@@ -0,0 +1,4 @@
+CC=clang
+LD=aarch64-none-elf-ld.bfd
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-default-clang-cc b/tf_config/fvp-default-clang-cc
new file mode 100644
index 0000000..bd7e3df
--- /dev/null
+++ b/tf_config/fvp-default-clang-cc
@@ -0,0 +1,3 @@
+CC=clang
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-detect-features-aarch64-only-cc b/tf_config/fvp-detect-features-aarch64-only-cc
new file mode 100644
index 0000000..28a7ca8
--- /dev/null
+++ b/tf_config/fvp-detect-features-aarch64-only-cc
@@ -0,0 +1,6 @@
+ARM_ARCH_MINOR=6
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+FEATURE_DETECTION=1
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-ea-ffh-cc b/tf_config/fvp-ea-ffh-cc
index 103d6c6..b3add65 100644
--- a/tf_config/fvp-ea-ffh-cc
+++ b/tf_config/fvp-ea-ffh-cc
@@ -1,5 +1,5 @@
 CROSS_COMPILE=aarch64-none-elf-
 HANDLE_EA_EL3_FIRST_NS=1
 PLATFORM_TEST_EA_FFH=1
-ENABLE_ASSERTIONS=0
 PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-early-d-cache-cc b/tf_config/fvp-early-d-cache-cc
new file mode 100644
index 0000000..b3dd76d
--- /dev/null
+++ b/tf_config/fvp-early-d-cache-cc
@@ -0,0 +1,4 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+WARMBOOT_ENABLE_DCACHE_EARLY=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-enable-runtime-instr-aarch64-only-cc b/tf_config/fvp-enable-runtime-instr-aarch64-only-cc
new file mode 100644
index 0000000..1a3d093
--- /dev/null
+++ b/tf_config/fvp-enable-runtime-instr-aarch64-only-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+ENABLE_RUNTIME_INSTRUMENTATION=1
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-enable-runtime-instr-cc b/tf_config/fvp-enable-runtime-instr-cc
index 7a30c8b..407feb4 100644
--- a/tf_config/fvp-enable-runtime-instr-cc
+++ b/tf_config/fvp-enable-runtime-instr-cc
@@ -1,4 +1,4 @@
 CROSS_COMPILE=aarch64-none-elf-
-ENABLE_ASSERTIONS=0
 ENABLE_RUNTIME_INSTRUMENTATION=1
 PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-ext-pstate-ea-el3-aarch64-only-cc b/tf_config/fvp-ext-pstate-ea-el3-aarch64-only-cc
new file mode 100644
index 0000000..f17f8e5
--- /dev/null
+++ b/tf_config/fvp-ext-pstate-ea-el3-aarch64-only-cc
@@ -0,0 +1,7 @@
+ARM_RECOM_STATE_ID_ENC=1
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+HANDLE_EA_EL3_FIRST_NS=1
+PLAT=fvp
+PSCI_EXTENDED_STATE_ID=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-ext-pstate-ea-el3-cc b/tf_config/fvp-ext-pstate-ea-el3-cc
index 5ca7f06..0b86d45 100644
--- a/tf_config/fvp-ext-pstate-ea-el3-cc
+++ b/tf_config/fvp-ext-pstate-ea-el3-cc
@@ -1,6 +1,6 @@
 ARM_RECOM_STATE_ID_ENC=1
 CROSS_COMPILE=aarch64-none-elf-
-ENABLE_ASSERTIONS=0
 HANDLE_EA_EL3_FIRST_NS=1
 PLAT=fvp
 PSCI_EXTENDED_STATE_ID=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-gcc-lto-cc b/tf_config/fvp-gcc-lto-cc
new file mode 100644
index 0000000..b595fac
--- /dev/null
+++ b/tf_config/fvp-gcc-lto-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_LTO=1
+PLAT=fvp
+
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-gicv4-cc b/tf_config/fvp-gicv4-cc
new file mode 100644
index 0000000..7f74993
--- /dev/null
+++ b/tf_config/fvp-gicv4-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+GIC_ENABLE_V4_EXTN=1
+GIC_EXT_INTID=1
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-gpt-cc b/tf_config/fvp-gpt-cc
new file mode 100644
index 0000000..1421f91
--- /dev/null
+++ b/tf_config/fvp-gpt-cc
@@ -0,0 +1,4 @@
+ARM_GPT_SUPPORT=1
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-hcx-aarch64-only-cc b/tf_config/fvp-hcx-aarch64-only-cc
new file mode 100644
index 0000000..70f964b
--- /dev/null
+++ b/tf_config/fvp-hcx-aarch64-only-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+ENABLE_FEAT_HCX=1
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-mb_hash256-tbb_hash256-romlib-cc b/tf_config/fvp-mb_hash256-tbb_hash256-romlib-cc
new file mode 100644
index 0000000..e4e9c1f
--- /dev/null
+++ b/tf_config/fvp-mb_hash256-tbb_hash256-romlib-cc
@@ -0,0 +1,10 @@
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+MEASURED_BOOT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+MBOOT_EL_HASH_ALG=sha256
+TRUSTED_BOARD_BOOT=1
+USE_ROMLIB=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-mtpmu-disable-aarch64-only-cc b/tf_config/fvp-mtpmu-disable-aarch64-only-cc
new file mode 100644
index 0000000..886c636
--- /dev/null
+++ b/tf_config/fvp-mtpmu-disable-aarch64-only-cc
@@ -0,0 +1,6 @@
+ARM_ARCH_MINOR=6
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+DISABLE_MTPMU=1
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-mtpmu-disable-cc b/tf_config/fvp-mtpmu-disable-cc
new file mode 100644
index 0000000..ea8048f
--- /dev/null
+++ b/tf_config/fvp-mtpmu-disable-cc
@@ -0,0 +1,5 @@
+ARM_ARCH_MINOR=6
+CROSS_COMPILE=aarch64-none-elf-
+DISABLE_MTPMU=1
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-no-brbe-regs-access-cc b/tf_config/fvp-no-brbe-regs-access-cc
new file mode 100644
index 0000000..624c499
--- /dev/null
+++ b/tf_config/fvp-no-brbe-regs-access-cc
@@ -0,0 +1,4 @@
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_BRBE_FOR_NS=0
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-no-cohmem-aarch64-only-cc b/tf_config/fvp-no-cohmem-aarch64-only-cc
new file mode 100644
index 0000000..fbd0744
--- /dev/null
+++ b/tf_config/fvp-no-cohmem-aarch64-only-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+PLAT=fvp
+USE_COHERENT_MEM=0
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-no-cohmem-cc b/tf_config/fvp-no-cohmem-cc
index f4417b3..c9d3b49 100644
--- a/tf_config/fvp-no-cohmem-cc
+++ b/tf_config/fvp-no-cohmem-cc
@@ -1,4 +1,4 @@
 CROSS_COMPILE=aarch64-none-elf-
-ENABLE_ASSERTIONS=0
 PLAT=fvp
 USE_COHERENT_MEM=0
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-no-optimize-default-cc b/tf_config/fvp-no-optimize-default-cc
new file mode 100644
index 0000000..65b1077
--- /dev/null
+++ b/tf_config/fvp-no-optimize-default-cc
@@ -0,0 +1,6 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+ARM_BL31_IN_DRAM=1
+LOG_LEVEL=20
+CFLAGS='-O0'
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-no-sys-regs-trace-access-aarch64-only-cc b/tf_config/fvp-no-sys-regs-trace-access-aarch64-only-cc
new file mode 100644
index 0000000..7c05143
--- /dev/null
+++ b/tf_config/fvp-no-sys-regs-trace-access-aarch64-only-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+ENABLE_SYS_REG_TRACE_FOR_NS=0
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-no-trbe-regs-access-aarch64-only-cc b/tf_config/fvp-no-trbe-regs-access-aarch64-only-cc
new file mode 100644
index 0000000..43be6ee
--- /dev/null
+++ b/tf_config/fvp-no-trbe-regs-access-aarch64-only-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+ENABLE_TRBE_FOR_NS=0
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-no-trf-regs-access-aarch64-only-cc b/tf_config/fvp-no-trf-regs-access-aarch64-only-cc
new file mode 100644
index 0000000..6082e7d
--- /dev/null
+++ b/tf_config/fvp-no-trf-regs-access-aarch64-only-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+ENABLE_TRF_FOR_NS=0
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-opteed-aarch64-only-cc b/tf_config/fvp-opteed-aarch64-only-cc
new file mode 100644
index 0000000..2e6116a
--- /dev/null
+++ b/tf_config/fvp-opteed-aarch64-only-cc
@@ -0,0 +1,6 @@
+ARM_TSP_RAM_LOCATION=tdram
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+PLAT=fvp
+SPD=opteed
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-opteed-cc b/tf_config/fvp-opteed-cc
index 39dfc3d..775b8cf 100644
--- a/tf_config/fvp-opteed-cc
+++ b/tf_config/fvp-opteed-cc
@@ -1,5 +1,5 @@
 ARM_TSP_RAM_LOCATION=tdram
 CROSS_COMPILE=aarch64-none-elf-
-ENABLE_ASSERTIONS=0
 PLAT=fvp
 SPD=opteed
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-bti-romlib-cc b/tf_config/fvp-pauth-bti-romlib-cc
new file mode 100644
index 0000000..ec9ea11
--- /dev/null
+++ b/tf_config/fvp-pauth-bti-romlib-cc
@@ -0,0 +1,10 @@
+ARM_ARCH_MINOR=5
+ARM_ROTPK_LOCATION=devel_rsa
+BRANCH_PROTECTION=4
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TRUSTED_BOARD_BOOT=1
+USE_ROMLIB=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-bti-sdei-cc b/tf_config/fvp-pauth-bti-sdei-cc
new file mode 100644
index 0000000..fa96bfb
--- /dev/null
+++ b/tf_config/fvp-pauth-bti-sdei-cc
@@ -0,0 +1,7 @@
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=4
+CROSS_COMPILE=aarch64-none-elf-
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-bti-tsp-romlib-cc b/tf_config/fvp-pauth-bti-tsp-romlib-cc
new file mode 100644
index 0000000..98c1eb5
--- /dev/null
+++ b/tf_config/fvp-pauth-bti-tsp-romlib-cc
@@ -0,0 +1,12 @@
+ARM_ARCH_MINOR=5
+ARM_ROTPK_LOCATION=devel_rsa
+BRANCH_PROTECTION=4
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+SPD=tspd
+TRUSTED_BOARD_BOOT=1
+TSP_NS_INTR_ASYNC_PREEMPT=1
+USE_ROMLIB=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-bti-tsp-sdei-cc b/tf_config/fvp-pauth-bti-tsp-sdei-cc
new file mode 100644
index 0000000..b798971
--- /dev/null
+++ b/tf_config/fvp-pauth-bti-tsp-sdei-cc
@@ -0,0 +1,9 @@
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=4
+CROSS_COMPILE=aarch64-none-elf-
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+SPD=tspd
+TSP_NS_INTR_ASYNC_PREEMPT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-ctx-sdei-cc b/tf_config/fvp-pauth-ctx-sdei-cc
new file mode 100644
index 0000000..f62047f
--- /dev/null
+++ b/tf_config/fvp-pauth-ctx-sdei-cc
@@ -0,0 +1,8 @@
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=1
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_PAUTH_REGS=1
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-ctx-tsp-sdei-cc b/tf_config/fvp-pauth-ctx-tsp-sdei-cc
new file mode 100644
index 0000000..8548d43
--- /dev/null
+++ b/tf_config/fvp-pauth-ctx-tsp-sdei-cc
@@ -0,0 +1,10 @@
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=1
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_PAUTH_REGS=1
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+SPD=tspd
+TSP_NS_INTR_ASYNC_PREEMPT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-pac-ret-leaf-sdei-cc b/tf_config/fvp-pauth-pac-ret-leaf-sdei-cc
new file mode 100644
index 0000000..246af00
--- /dev/null
+++ b/tf_config/fvp-pauth-pac-ret-leaf-sdei-cc
@@ -0,0 +1,8 @@
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=3
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_PAUTH_REGS=1
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-pac-ret-leaf-tsp-sdei-cc b/tf_config/fvp-pauth-pac-ret-leaf-tsp-sdei-cc
new file mode 100644
index 0000000..a5ba855
--- /dev/null
+++ b/tf_config/fvp-pauth-pac-ret-leaf-tsp-sdei-cc
@@ -0,0 +1,10 @@
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=3
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_PAUTH_REGS=1
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+SPD=tspd
+TSP_NS_INTR_ASYNC_PREEMPT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-pac-ret-sdei-cc b/tf_config/fvp-pauth-pac-ret-sdei-cc
new file mode 100644
index 0000000..3272a54
--- /dev/null
+++ b/tf_config/fvp-pauth-pac-ret-sdei-cc
@@ -0,0 +1,8 @@
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=2
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_PAUTH_REGS=1
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-pac-ret-tsp-sdei-cc b/tf_config/fvp-pauth-pac-ret-tsp-sdei-cc
new file mode 100644
index 0000000..69a6d16
--- /dev/null
+++ b/tf_config/fvp-pauth-pac-ret-tsp-sdei-cc
@@ -0,0 +1,10 @@
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=2
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_PAUTH_REGS=1
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+SPD=tspd
+TSP_NS_INTR_ASYNC_PREEMPT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-standard-romlib-cc b/tf_config/fvp-pauth-standard-romlib-cc
new file mode 100644
index 0000000..eaecfee
--- /dev/null
+++ b/tf_config/fvp-pauth-standard-romlib-cc
@@ -0,0 +1,11 @@
+ARM_ARCH_MINOR=5
+ARM_ROTPK_LOCATION=devel_rsa
+BRANCH_PROTECTION=1
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_PAUTH_REGS=1
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TRUSTED_BOARD_BOOT=1
+USE_ROMLIB=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-standard-sdei-cc b/tf_config/fvp-pauth-standard-sdei-cc
new file mode 100644
index 0000000..f62047f
--- /dev/null
+++ b/tf_config/fvp-pauth-standard-sdei-cc
@@ -0,0 +1,8 @@
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=1
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_PAUTH_REGS=1
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-standard-tsp-romlib-cc b/tf_config/fvp-pauth-standard-tsp-romlib-cc
new file mode 100644
index 0000000..bc59898
--- /dev/null
+++ b/tf_config/fvp-pauth-standard-tsp-romlib-cc
@@ -0,0 +1,13 @@
+ARM_ARCH_MINOR=5
+ARM_ROTPK_LOCATION=devel_rsa
+BRANCH_PROTECTION=1
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_PAUTH_REGS=1
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+SPD=tspd
+TRUSTED_BOARD_BOOT=1
+TSP_NS_INTR_ASYNC_PREEMPT=1
+USE_ROMLIB=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pauth-standard-tsp-sdei-cc b/tf_config/fvp-pauth-standard-tsp-sdei-cc
new file mode 100644
index 0000000..8548d43
--- /dev/null
+++ b/tf_config/fvp-pauth-standard-tsp-sdei-cc
@@ -0,0 +1,10 @@
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=1
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_PAUTH_REGS=1
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SDEI_SUPPORT=1
+SPD=tspd
+TSP_NS_INTR_ASYNC_PREEMPT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-pl33-cc b/tf_config/fvp-pl33-cc
index 1bc344c..425a62c 100644
--- a/tf_config/fvp-pl33-cc
+++ b/tf_config/fvp-pl33-cc
@@ -1,4 +1,4 @@
 CROSS_COMPILE=aarch64-none-elf-
-ENABLE_ASSERTIONS=0
 PLAT=fvp
 PRELOADED_BL33_BASE=0x88000000
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-reclaim-init-code-cc b/tf_config/fvp-reclaim-init-code-cc
new file mode 100644
index 0000000..6309d78
--- /dev/null
+++ b/tf_config/fvp-reclaim-init-code-cc
@@ -0,0 +1,4 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+RECLAIM_INIT_CODE=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-rng-trap-cc b/tf_config/fvp-rng-trap-cc
new file mode 100644
index 0000000..aecccf6
--- /dev/null
+++ b/tf_config/fvp-rng-trap-cc
@@ -0,0 +1,7 @@
+ARM_ARCH_FEATURE=rng
+ARM_ARCH_MINOR=5
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_FEAT_RNG=1
+ENABLE_FEAT_RNG_TRAP=1
+PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-spm-mm-cc b/tf_config/fvp-spm-mm-cc
index 8cdfdc1..f567e79 100644
--- a/tf_config/fvp-spm-mm-cc
+++ b/tf_config/fvp-spm-mm-cc
@@ -2,7 +2,7 @@
 CROSS_COMPILE=aarch64-none-elf-
 CTX_INCLUDE_FPREGS=1
 EL3_EXCEPTION_HANDLING=1
-ENABLE_ASSERTIONS=0
 ENABLE_SVE_FOR_NS=0
 SPM_MM=1
 PLAT=fvp
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tbb-mbedtls-ecdsa-cc b/tf_config/fvp-tbb-mbedtls-ecdsa-cc
new file mode 100644
index 0000000..5f0e5a9
--- /dev/null
+++ b/tf_config/fvp-tbb-mbedtls-ecdsa-cc
@@ -0,0 +1,9 @@
+ARM_ROTPK_LOCATION=devel_ecdsa
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_ASSERTIONS=0
+GENERATE_COT=1
+KEY_ALG=ecdsa
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_ecdsa.pem
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tbb-mbedtls-ecdsa-sha512-cc b/tf_config/fvp-tbb-mbedtls-ecdsa-sha512-cc
new file mode 100644
index 0000000..a9bbf1e
--- /dev/null
+++ b/tf_config/fvp-tbb-mbedtls-ecdsa-sha512-cc
@@ -0,0 +1,9 @@
+ARM_ROTPK_LOCATION=devel_ecdsa
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+HASH_ALG=sha512
+KEY_ALG=ecdsa
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_ecdsa.pem
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tbb-mbedtls-full-dev-rsa-key-cc b/tf_config/fvp-tbb-mbedtls-full-dev-rsa-key-cc
new file mode 100644
index 0000000..794cc21
--- /dev/null
+++ b/tf_config/fvp-tbb-mbedtls-full-dev-rsa-key-cc
@@ -0,0 +1,8 @@
+ARM_ROTPK_LOCATION=devel_full_dev_rsa_key
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+KEY_ALG=rsa
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tbb-mbedtls-romlib-cot-in-dtb-cc b/tf_config/fvp-tbb-mbedtls-romlib-cot-in-dtb-cc
new file mode 100644
index 0000000..1cb7d8e
--- /dev/null
+++ b/tf_config/fvp-tbb-mbedtls-romlib-cot-in-dtb-cc
@@ -0,0 +1,9 @@
+ARM_ROTPK_LOCATION=devel_rsa
+COT_DESC_IN_DTB=1
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TRUSTED_BOARD_BOOT=1
+USE_ROMLIB=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tbb-mbedtls-rsa-3k-cert-cc b/tf_config/fvp-tbb-mbedtls-rsa-3k-cert-cc
new file mode 100644
index 0000000..05614f8
--- /dev/null
+++ b/tf_config/fvp-tbb-mbedtls-rsa-3k-cert-cc
@@ -0,0 +1,11 @@
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_ASSERTIONS=0
+GENERATE_COT=1
+KEY_ALG=rsa
+KEY_SIZE=3072
+LOG_LEVEL=20
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tbb-mbedtls-rsa-4k-cert-cc b/tf_config/fvp-tbb-mbedtls-rsa-4k-cert-cc
new file mode 100644
index 0000000..deb0183
--- /dev/null
+++ b/tf_config/fvp-tbb-mbedtls-rsa-4k-cert-cc
@@ -0,0 +1,11 @@
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_ASSERTIONS=0
+GENERATE_COT=1
+KEY_ALG=rsa
+KEY_SIZE=4096
+LOG_LEVEL=20
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tbb-mbedtls-rsa-ecdsa-with-ecdsa-rotpk-rsa-cert-cc b/tf_config/fvp-tbb-mbedtls-rsa-ecdsa-with-ecdsa-rotpk-rsa-cert-cc
new file mode 100644
index 0000000..6244675
--- /dev/null
+++ b/tf_config/fvp-tbb-mbedtls-rsa-ecdsa-with-ecdsa-rotpk-rsa-cert-cc
@@ -0,0 +1,11 @@
+ARM_ROTPK_LOCATION=devel_ecdsa
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_ASSERTIONS=0
+GENERATE_COT=1
+KEY_ALG=rsa
+LOG_LEVEL=20
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_ecdsa.pem
+TF_MBEDTLS_KEY_ALG=rsa+ecdsa
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tbb-mbedtls-rsa-ecdsa-with-rsa-rotpk-ecdsa-cert-cc b/tf_config/fvp-tbb-mbedtls-rsa-ecdsa-with-rsa-rotpk-ecdsa-cert-cc
new file mode 100644
index 0000000..61253df
--- /dev/null
+++ b/tf_config/fvp-tbb-mbedtls-rsa-ecdsa-with-rsa-rotpk-ecdsa-cert-cc
@@ -0,0 +1,11 @@
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_ASSERTIONS=0
+GENERATE_COT=1
+KEY_ALG=ecdsa
+LOG_LEVEL=20
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TF_MBEDTLS_KEY_ALG=rsa+ecdsa
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tbb-mbedtls-upcounter-cc b/tf_config/fvp-tbb-mbedtls-upcounter-cc
new file mode 100644
index 0000000..761fc51
--- /dev/null
+++ b/tf_config/fvp-tbb-mbedtls-upcounter-cc
@@ -0,0 +1,8 @@
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+TFW_NVCTR_VAL=32
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tspd-aarch64-only-cc b/tf_config/fvp-tspd-aarch64-only-cc
new file mode 100644
index 0000000..878cbd4
--- /dev/null
+++ b/tf_config/fvp-tspd-aarch64-only-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+PLAT=fvp
+SPD=tspd
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tspd-cc b/tf_config/fvp-tspd-cc
index 1ec3ef5..184a3c6 100644
--- a/tf_config/fvp-tspd-cc
+++ b/tf_config/fvp-tspd-cc
@@ -1,4 +1,4 @@
 CROSS_COMPILE=aarch64-none-elf-
-ENABLE_ASSERTIONS=0
 PLAT=fvp
 SPD=tspd
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tspd-quad-cluster-cc b/tf_config/fvp-tspd-quad-cluster-cc
new file mode 100644
index 0000000..e4de770
--- /dev/null
+++ b/tf_config/fvp-tspd-quad-cluster-cc
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+FVP_CLUSTER_COUNT=4
+PLAT=fvp
+SPD=tspd
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tspd-tbb-mbedtls-cc b/tf_config/fvp-tspd-tbb-mbedtls-cc
index 64a598b..655d8ca 100644
--- a/tf_config/fvp-tspd-tbb-mbedtls-cc
+++ b/tf_config/fvp-tspd-tbb-mbedtls-cc
@@ -1,8 +1,8 @@
 ARM_ROTPK_LOCATION=devel_rsa
 CROSS_COMPILE=aarch64-none-elf-
-ENABLE_ASSERTIONS=0
 GENERATE_COT=1
 PLAT=fvp
 ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
 SPD=tspd
 TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tspd-tbb-mbedtls-dualroot-cc b/tf_config/fvp-tspd-tbb-mbedtls-dualroot-cc
new file mode 100644
index 0000000..52be814
--- /dev/null
+++ b/tf_config/fvp-tspd-tbb-mbedtls-dualroot-cc
@@ -0,0 +1,9 @@
+ARM_ROTPK_LOCATION=devel_rsa
+COT=dualroot
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+SPD=tspd
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tspd-tbb-mbedtls-ecdsa-dualroot-cc b/tf_config/fvp-tspd-tbb-mbedtls-ecdsa-dualroot-cc
new file mode 100644
index 0000000..dda259f
--- /dev/null
+++ b/tf_config/fvp-tspd-tbb-mbedtls-ecdsa-dualroot-cc
@@ -0,0 +1,12 @@
+ARM_ROTPK_LOCATION=devel_ecdsa
+COT=dualroot
+CROSS_COMPILE=aarch64-none-elf-
+ENABLE_ASSERTIONS=0
+GENERATE_COT=1
+KEY_ALG=ecdsa
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_ecdsa.pem
+SPD=tspd
+TF_MBEDTLS_KEY_ALG=rsa+ecdsa
+TRUSTED_BOARD_BOOT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tspd-tbb-mbedtls-pauth-cc b/tf_config/fvp-tspd-tbb-mbedtls-pauth-cc
index 7b4d333..9659b73 100644
--- a/tf_config/fvp-tspd-tbb-mbedtls-pauth-cc
+++ b/tf_config/fvp-tspd-tbb-mbedtls-pauth-cc
@@ -3,9 +3,10 @@
 BRANCH_PROTECTION=1
 CROSS_COMPILE=aarch64-none-elf-
 CTX_INCLUDE_PAUTH_REGS=1
-ENABLE_ASSERTIONS=0
 GENERATE_COT=1
 PLAT=fvp
 ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
 SPD=tspd
 TRUSTED_BOARD_BOOT=1
+USE_ROMLIB=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tspd-tbb-mbedtls-rsa-4k-cert-cc b/tf_config/fvp-tspd-tbb-mbedtls-rsa-4k-cert-cc
new file mode 100644
index 0000000..fed5232
--- /dev/null
+++ b/tf_config/fvp-tspd-tbb-mbedtls-rsa-4k-cert-cc
@@ -0,0 +1,9 @@
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+PLAT=fvp
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+SPD=tspd
+TRUSTED_BOARD_BOOT=1
+KEY_SIZE=4096
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-tspd-tsp-async-ehf-cc b/tf_config/fvp-tspd-tsp-async-ehf-cc
new file mode 100644
index 0000000..b9fe555
--- /dev/null
+++ b/tf_config/fvp-tspd-tsp-async-ehf-cc
@@ -0,0 +1,7 @@
+CROSS_COMPILE=aarch64-none-elf-
+EL3_EXCEPTION_HANDLING=1
+PLAT=fvp
+SPD=tspd
+TSP_INIT_ASYNC=1
+TSP_NS_INTR_ASYNC_PREEMPT=1
+ENABLE_ASSERTIONS=0
diff --git a/tf_config/fvp-ubsan-cc b/tf_config/fvp-ubsan-cc
new file mode 100644
index 0000000..65469b7
--- /dev/null
+++ b/tf_config/fvp-ubsan-cc
@@ -0,0 +1,4 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=fvp
+SANITIZE_UB=trap
+ENABLE_ASSERTIONS=0