refactor: rename HANDLE_EA_EL3_FIRST to HANDLE_EA_EL3_FIRST_NS

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I3652ec08c168a7b30c60d36623292215e2c3df65
diff --git a/script/tf-coverity/tf-cov-make b/script/tf-coverity/tf-cov-make
index 6bf53b7..6dde39f 100755
--- a/script/tf-coverity/tf-cov-make
+++ b/script/tf-coverity/tf-cov-make
@@ -147,7 +147,7 @@
 
 # RAS Extension Support
 clean_build $fvp_common_flags EL3_EXCEPTION_HANDLING=1 \
-    FAULT_INJECTION_SUPPORT=1 HANDLE_EA_EL3_FIRST=1 RAS_EXTENSION=1 \
+    FAULT_INJECTION_SUPPORT=1 HANDLE_EA_EL3_FIRST_NS=1 RAS_EXTENSION=1 \
     SDEI_SUPPORT=1
 
 # Hardware Assisted Coherency(DynamIQ)
@@ -479,7 +479,7 @@
 
 # Platforms from Marvell
 make PLAT=a3700 $(common_flags) SCP_BL2=/dev/null CM3_SYSTEM_RESET=1 \
-    A3720_DB_PM_WAKEUP_SRC=1 HANDLE_EA_EL3_FIRST=1 all
+    A3720_DB_PM_WAKEUP_SRC=1 HANDLE_EA_EL3_FIRST_NS=1 all
 
 # Source files from mv-ddr-marvell repository are necessary
 # to build below four platforms
diff --git a/tf_config/fvp-crash-report b/tf_config/fvp-crash-report
index b9e7706..a766f9c 100644
--- a/tf_config/fvp-crash-report
+++ b/tf_config/fvp-crash-report
@@ -3,6 +3,6 @@
 EL3_EXCEPTION_HANDLING=1
 ENABLE_BACKTRACE=1
 FAULT_INJECTION_SUPPORT=1
-HANDLE_EA_EL3_FIRST=1
+HANDLE_EA_EL3_FIRST_NS=1
 PLAT=fvp
 SDEI_SUPPORT=1
diff --git a/tf_config/fvp-ext-pstate-ea-el3 b/tf_config/fvp-ext-pstate-ea-el3
index 22919b9..153a887 100644
--- a/tf_config/fvp-ext-pstate-ea-el3
+++ b/tf_config/fvp-ext-pstate-ea-el3
@@ -1,5 +1,5 @@
 ARM_RECOM_STATE_ID_ENC=1
 CROSS_COMPILE=aarch64-none-elf-
-HANDLE_EA_EL3_FIRST=1
+HANDLE_EA_EL3_FIRST_NS=1
 PLAT=fvp
 PSCI_EXTENDED_STATE_ID=1
diff --git a/tf_config/fvp-ext-pstate-ea-el3-aarch64-only b/tf_config/fvp-ext-pstate-ea-el3-aarch64-only
index 34a1a58..3d8316d 100644
--- a/tf_config/fvp-ext-pstate-ea-el3-aarch64-only
+++ b/tf_config/fvp-ext-pstate-ea-el3-aarch64-only
@@ -1,6 +1,6 @@
 ARM_RECOM_STATE_ID_ENC=1
 CROSS_COMPILE=aarch64-none-elf-
 CTX_INCLUDE_AARCH32_REGS=0
-HANDLE_EA_EL3_FIRST=1
+HANDLE_EA_EL3_FIRST_NS=1
 PLAT=fvp
 PSCI_EXTENDED_STATE_ID=1
diff --git a/tf_config/fvp-ext-pstate-ea-el3-cc b/tf_config/fvp-ext-pstate-ea-el3-cc
index e02819c..5ca7f06 100644
--- a/tf_config/fvp-ext-pstate-ea-el3-cc
+++ b/tf_config/fvp-ext-pstate-ea-el3-cc
@@ -1,6 +1,6 @@
 ARM_RECOM_STATE_ID_ENC=1
 CROSS_COMPILE=aarch64-none-elf-
 ENABLE_ASSERTIONS=0
-HANDLE_EA_EL3_FIRST=1
+HANDLE_EA_EL3_FIRST_NS=1
 PLAT=fvp
 PSCI_EXTENDED_STATE_ID=1
diff --git a/tf_config/fvp-ras-fault-inject b/tf_config/fvp-ras-fault-inject
index 35bb31e..b22ac2a 100644
--- a/tf_config/fvp-ras-fault-inject
+++ b/tf_config/fvp-ras-fault-inject
@@ -1,7 +1,7 @@
 CROSS_COMPILE=aarch64-none-elf-
 EL3_EXCEPTION_HANDLING=1
 FAULT_INJECTION_SUPPORT=1
-HANDLE_EA_EL3_FIRST=1
+HANDLE_EA_EL3_FIRST_NS=1
 PLAT=fvp
 RAS_EXTENSION=1
 SDEI_SUPPORT=1