ci: Move TC2 test configs for TC3
Also avoid setting CTX_INCLUDE_PAUTH_REGS explicitly as it is now
automatically governed by the BRANCH_PROTECTION build option.
Change-Id: I3597469295e178440dd1933696f2f64f7028ab1b
Signed-off-by: David Vincze <david.vincze@arm.com>
diff --git a/group/tf-l2-boot-tests-arm-plats/fvp-tbb-tc2-mb:fvp-tc.crash-linux.tc-fip.tc-tc2-debug b/group/tf-l2-boot-tests-arm-plats/fvp-tbb-tc3-mb:fvp-tc.crash-linux.tc-fip.tc-tc3-debug
similarity index 80%
rename from group/tf-l2-boot-tests-arm-plats/fvp-tbb-tc2-mb:fvp-tc.crash-linux.tc-fip.tc-tc2-debug
rename to group/tf-l2-boot-tests-arm-plats/fvp-tbb-tc3-mb:fvp-tc.crash-linux.tc-fip.tc-tc3-debug
index 2ea94c3..5e837af 100644
--- a/group/tf-l2-boot-tests-arm-plats/fvp-tbb-tc2-mb:fvp-tc.crash-linux.tc-fip.tc-tc2-debug
+++ b/group/tf-l2-boot-tests-arm-plats/fvp-tbb-tc3-mb:fvp-tc.crash-linux.tc-fip.tc-tc3-debug
@@ -6,4 +6,4 @@
# Note that this uses the fvp-linux.tc run fragment, which does not actually boot to linux,
# as it is the only way to get an image signed and assembled correctly for RSE to boot it.
-# If this is resolved at some point, that frament should be removed.
+# If this is resolved at some point, that fragment should be removed.
diff --git a/group/tf-l2-boot-tests-misc/fvp-tc2-default,fvp-tc2-asymmetric:fvp-fip.tc.tftf-tc2-debug b/group/tf-l2-boot-tests-misc/fvp-tc3-default,fvp-tc3-asymmetric:fvp-fip.tc.tftf-tc3-debug
similarity index 100%
rename from group/tf-l2-boot-tests-misc/fvp-tc2-default,fvp-tc2-asymmetric:fvp-fip.tc.tftf-tc2-debug
rename to group/tf-l2-boot-tests-misc/fvp-tc3-default,fvp-tc3-asymmetric:fvp-fip.tc.tftf-tc3-debug
diff --git a/group/tf-l3-boot-tests-misc/fvp-tbb-tc2-mb:fvp-linux.tc-fip.tc-tc.signer-tc2-debug b/group/tf-l3-boot-tests-misc/fvp-tbb-tc3-mb:fvp-linux.tc-fip.tc-tc.signer-tc3-debug
similarity index 100%
rename from group/tf-l3-boot-tests-misc/fvp-tbb-tc2-mb:fvp-linux.tc-fip.tc-tc.signer-tc2-debug
rename to group/tf-l3-boot-tests-misc/fvp-tbb-tc3-mb:fvp-linux.tc-fip.tc-tc.signer-tc3-debug
diff --git a/group/tf-l3-boot-tests-misc/fvp-tc2-tbb-dpe:fvp-linux.tc-fip.tc-tc2-debug b/group/tf-l3-boot-tests-misc/fvp-tc3-tbb-dpe:fvp-linux.tc-fip.tc-tc3-debug
similarity index 100%
rename from group/tf-l3-boot-tests-misc/fvp-tc2-tbb-dpe:fvp-linux.tc-fip.tc-tc2-debug
rename to group/tf-l3-boot-tests-misc/fvp-tc3-tbb-dpe:fvp-linux.tc-fip.tc-tc3-debug
diff --git a/tf_config/fvp-tbb-tc3-mb b/tf_config/fvp-tbb-tc3-mb
new file mode 100644
index 0000000..17f3e8a
--- /dev/null
+++ b/tf_config/fvp-tbb-tc3-mb
@@ -0,0 +1,11 @@
+ARM_GPT_SUPPORT=1
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+PLAT=tc
+PLATFORM_TEST=tfm-testsuite
+MEASURED_BOOT=1
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+SCP_BL2=/dev/null
+TARGET_PLATFORM=3
+TRUSTED_BOARD_BOOT=1
diff --git a/tf_config/fvp-tc3-default b/tf_config/fvp-tc3-default
new file mode 100644
index 0000000..1c7100d
--- /dev/null
+++ b/tf_config/fvp-tc3-default
@@ -0,0 +1,5 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=tc
+TARGET_PLATFORM=3
+ARM_GPT_SUPPORT=1
+SCP_BL2=/dev/null
diff --git a/tf_config/fvp-tc3-spm b/tf_config/fvp-tc3-spm
index b516f4d..e7c1fe8 100644
--- a/tf_config/fvp-tc3-spm
+++ b/tf_config/fvp-tc3-spm
@@ -1,8 +1,8 @@
-ARM_ARCH_MINOR=5
+ARM_ARCH_MAJOR=8
+ARM_ARCH_MINOR=7
ARM_GPT_SUPPORT=1
BRANCH_PROTECTION=1
CROSS_COMPILE=aarch64-none-elf-
-CTX_INCLUDE_PAUTH_REGS=1
ENABLE_FEAT_MTE2=1
ENABLE_SVE_FOR_SWD=1
PLAT=tc
diff --git a/tf_config/fvp-tc3-tbb b/tf_config/fvp-tc3-tbb
index 5660d4a..ea738a3 100644
--- a/tf_config/fvp-tc3-tbb
+++ b/tf_config/fvp-tc3-tbb
@@ -2,7 +2,6 @@
ARM_ROTPK_LOCATION=devel_rsa
BRANCH_PROTECTION=1
CROSS_COMPILE=aarch64-none-elf-
-CTX_INCLUDE_PAUTH_REGS=1
GENERATE_COT=1
PLAT=tc
ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
diff --git a/tf_config/fvp-tc3-tbb-dpe b/tf_config/fvp-tc3-tbb-dpe
new file mode 100644
index 0000000..08e71fc
--- /dev/null
+++ b/tf_config/fvp-tc3-tbb-dpe
@@ -0,0 +1,16 @@
+ARM_ARCH_MAJOR=8
+ARM_ARCH_MINOR=7
+ARM_GPT_SUPPORT=1
+ARM_ROTPK_LOCATION=devel_rsa
+BRANCH_PROTECTION=1
+CROSS_COMPILE=aarch64-none-elf-
+DICE_PROTECTION_ENVIRONMENT=1
+ENABLE_SVE_FOR_SWD=1
+GENERATE_COT=1
+MEASURED_BOOT=1
+PLAT=tc
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+SCP_BL2=/dev/null
+TARGET_PLATFORM=3
+TRUSTED_BOARD_BOOT=1
+ENABLE_FEAT_MTE2=1
diff --git a/tftf_config/fvp-tc3-asymmetric b/tftf_config/fvp-tc3-asymmetric
new file mode 100644
index 0000000..5a070cc
--- /dev/null
+++ b/tftf_config/fvp-tc3-asymmetric
@@ -0,0 +1,6 @@
+ARM_ARCH_MAJOR=8
+ARM_ARCH_MINOR=7
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=tc
+TARGET_PLATFORM=3
+TESTS=asymmetric-features