This section contains interrupt bit masks to be used with:
Macros | |
| #define | CY_CANFD_RX_FIFO_0_WATERMARK_REACHED (CANFD_CH_M_TTCAN_IR_RF0W_Msk) |
| Rx FIFO 0 Watermark Reached. | |
| #define | CY_CANFD_RX_FIFO_0_FULL (CANFD_CH_M_TTCAN_IR_RF0F_Msk) |
| Rx FIFO 0 Full. | |
| #define | CY_CANFD_RX_FIFO_0_MSG_LOST (CANFD_CH_M_TTCAN_IR_RF0L__Msk) |
| Rx FIFO 0 Message Lost. | |
| #define | CY_CANFD_RX_FIFO_1_WATERMARK_REACHED (CANFD_CH_M_TTCAN_IR_RF1W_Msk) |
| Rx FIFO 1 Watermark Reached. | |
| #define | CY_CANFD_RX_FIFO_1_FULL (CANFD_CH_M_TTCAN_IR_RF1F_Msk) |
| Rx FIFO 1 Full. | |
| #define | CY_CANFD_RX_FIFO_1_MSG_LOST (CANFD_CH_M_TTCAN_IR_RF1L__Msk) |
| Rx FIFO 1 Message Lost. | |
| #define | CY_CANFD_TX_FIFO_1_WATERMARK_REACHED (CANFD_CH_M_TTCAN_IR_TEFW_Msk) |
| Tx Event FIFO Watermark Reached. | |
| #define | CY_CANFD_TX_FIFO_1_FULL (CANFD_CH_M_TTCAN_IR_TEFF_Msk) |
| Tx Event FIFO Full. | |
| #define | CY_CANFD_TX_FIFO_1_MSG_LOST (CANFD_CH_M_TTCAN_IR_TEFL__Msk) |
| Tx Event FIFO Element Lost. | |
| #define | CY_CANFD_TIMESTAMP_WRAPAROUND (CANFD_CH_M_TTCAN_IR_TSW_Msk) |
| Timestamp Wraparound. | |
| #define | CY_CANFD_MRAM_ACCESS_FAILURE (CANFD_CH_M_TTCAN_IR_MRAF_Msk) |
| Message RAM Access Failure. | |
| #define | CY_CANFD_TIMEOUT_OCCURRED (CANFD_CH_M_TTCAN_IR_TOO_Msk) |
| Timeout Occurred. | |
| #define | CY_CANFD_BIT_ERROR_CORRECTED (CANFD_CH_M_TTCAN_IR_BEC_Msk) |
| Bit Error Corrected. | |
| #define | CY_CANFD_BIT_ERROR_UNCORRECTED (CANFD_CH_M_TTCAN_IR_BEU_Msk) |
| Bit Error Uncorrected. | |
| #define | CY_CANFD_ERROR_LOG_OVERFLOW (CANFD_CH_M_TTCAN_IR_ELO_Msk) |
| Error Logging Overflow. | |
| #define | CY_CANFD_ERROR_PASSIVE (CANFD_CH_M_TTCAN_IR_EP__Msk) |
| Error Passive. | |
| #define | CY_CANFD_WARNING_STATUS (CANFD_CH_M_TTCAN_IR_EW__Msk) |
| Warning Status. | |
| #define | CY_CANFD_BUS_OFF_STATUS (CANFD_CH_M_TTCAN_IR_BO__Msk) |
| Bus_Off Status. | |
| #define | CY_CANFD_WATCHDOG_INTERRUPT (CANFD_CH_M_TTCAN_IR_WDI_Msk) |
| Watchdog Interrupt. | |
| #define | CY_CANFD_PROTOCOL_ERROR_ARB_PHASE (CANFD_CH_M_TTCAN_IR_PEA_Msk) |
| Protocol Error in Arbitration Phase. | |
| #define | CY_CANFD_PROTOCOL_ERROR_DATA_PHASE (CANFD_CH_M_TTCAN_IR_PED_Msk) |
| Protocol Error in Data Phase. | |
| #define | CY_CANFD_ACCESS_RESERVED_ADDR (CANFD_CH_M_TTCAN_IR_ARA_Msk) |
| Access to Reserved Address. | |